2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-12-13 20:49:12 +00:00
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/*
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* Copyright (c) 2012 The Chromium OS Authors.
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#ifndef __ASM_GENERIC_GBL_DATA_H
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#define __ASM_GENERIC_GBL_DATA_H
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/*
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* The following data structure is placed in some memory which is
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* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
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* some locked parts of the data cache) to allow for a minimum set of
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* global variables during system initialization (until we have set
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* up the memory controller so that we can use RAM).
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*
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* Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
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*
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* Each architecture has its own private fields. For now all are private
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*/
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#ifndef __ASSEMBLY__
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2019-04-12 14:42:28 +00:00
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#include <fdtdec.h>
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2015-11-09 06:47:48 +00:00
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#include <membuff.h>
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2014-02-26 22:59:18 +00:00
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#include <linux/list.h>
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2020-11-04 16:57:19 +00:00
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struct acpi_ctx;
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2020-10-03 17:31:33 +00:00
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struct driver_rt;
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2020-10-05 06:30:09 +00:00
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typedef struct global_data gd_t;
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/**
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* struct global_data - global data structure
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*/
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struct global_data {
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/**
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* @bd: board information
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*/
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2020-02-24 17:22:27 +00:00
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struct bd_info *bd;
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2020-10-05 06:30:09 +00:00
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/**
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* @flags: global data flags
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*
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* See &enum gd_flags
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*/
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2012-12-13 20:49:12 +00:00
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unsigned long flags;
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2020-10-05 06:30:09 +00:00
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/**
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* @baudrate: baud rate of the serial interface
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*/
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2013-03-05 14:40:05 +00:00
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unsigned int baudrate;
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2020-10-05 06:30:09 +00:00
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/**
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* @cpu_clk: CPU clock rate in Hz
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*/
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unsigned long cpu_clk;
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/**
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* @bus_clk: platform clock rate in Hz
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*/
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2012-12-13 20:49:12 +00:00
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unsigned long bus_clk;
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2020-10-05 06:30:09 +00:00
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/**
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* @pci_clk: PCI clock rate in Hz
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*/
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2012-12-13 20:49:12 +00:00
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/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
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unsigned long pci_clk;
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2020-10-05 06:30:09 +00:00
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/**
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* @mem_clk: memory clock rate in Hz
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*/
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2012-12-13 20:49:12 +00:00
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unsigned long mem_clk;
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2019-07-22 04:49:04 +00:00
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#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
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2020-10-05 06:30:09 +00:00
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/**
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* @fb_base: base address of frame buffer memory
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*/
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unsigned long fb_base;
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2012-12-13 20:49:12 +00:00
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#endif
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2017-12-04 20:48:23 +00:00
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#if defined(CONFIG_POST)
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2020-10-05 06:30:09 +00:00
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/**
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* @post_log_word: active POST tests
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*
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* @post_log_word is a bit mask defining which POST tests are recorded
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* (see constants POST_*).
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*/
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unsigned long post_log_word;
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/**
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* @post_log_res: POST results
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*
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* @post_log_res is a bit mask with the POST results. A bit with value 1
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* indicates successful execution.
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*/
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unsigned long post_log_res;
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/**
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* @post_init_f_time: time in ms when post_init_f() started
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*/
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unsigned long post_init_f_time;
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2012-12-13 20:49:12 +00:00
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#endif
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#ifdef CONFIG_BOARD_TYPES
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2020-10-05 06:30:09 +00:00
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/**
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* @board_type: board type
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*
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* If a U-Boot configuration supports multiple board types, the actual
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* board type may be stored in this field.
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*/
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2012-12-13 20:49:12 +00:00
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unsigned long board_type;
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#endif
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2020-10-05 06:30:09 +00:00
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/**
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* @have_console: console is available
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*
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* A value of 1 indicates that serial_init() was called and a console
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* is available.
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* A value of 0 indicates that console input and output drivers shall
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* not be called.
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*/
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unsigned long have_console;
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2016-10-18 02:12:36 +00:00
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#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
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2020-10-05 06:30:09 +00:00
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/**
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* @precon_buf_idx: pre-console buffer index
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*
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* @precon_buf_idx indicates the current position of the buffer used to
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* collect output before the console becomes available
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*/
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unsigned long precon_buf_idx;
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2012-12-13 20:49:12 +00:00
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#endif
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2020-10-05 06:30:09 +00:00
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/**
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* @env_addr: address of environment structure
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*
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* @env_addr contains the address of the structure holding the
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* environment variables.
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*/
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unsigned long env_addr;
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/**
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* @env_valid: environment is valid
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*
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* See &enum env_valid
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*/
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unsigned long env_valid;
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/**
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* @env_has_init: bit mask indicating environment locations
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*
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* &enum env_location defines which bit relates to which location
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*/
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unsigned long env_has_init;
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/**
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* @env_load_prio: priority of the loaded environment
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*/
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int env_load_prio;
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/**
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* @ram_base: base address of RAM used by U-Boot
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*/
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unsigned long ram_base;
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/**
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* @ram_top: top address of RAM used by U-Boot
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*/
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2021-01-31 12:35:59 +00:00
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phys_addr_t ram_top;
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2020-10-05 06:30:09 +00:00
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/**
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* @relocaddr: start address of U-Boot in RAM
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*
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* After relocation this field indicates the address to which U-Boot
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* has been relocated. It can be displayed using the bdinfo command.
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* Its value is needed to display the source code when debugging with
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* GDB using the 'add-symbol-file u-boot <relocaddr>' command.
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*/
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unsigned long relocaddr;
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/**
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* @ram_size: RAM size in bytes
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*/
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phys_size_t ram_size;
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/**
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* @mon_len: monitor length in bytes
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*/
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unsigned long mon_len;
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/**
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* @irq_sp: IRQ stack pointer
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*/
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unsigned long irq_sp;
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/**
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* @start_addr_sp: initial stack pointer address
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*/
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unsigned long start_addr_sp;
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/**
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* @reloc_off: relocation offset
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*/
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2012-12-13 20:49:12 +00:00
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unsigned long reloc_off;
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2020-10-05 06:30:09 +00:00
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/**
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* @new_gd: pointer to relocated global data
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*/
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struct global_data *new_gd;
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2014-02-26 22:59:18 +00:00
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#ifdef CONFIG_DM
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fdt: translate address if #size-cells = <0>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.
The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.
The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:
+
ranges = of_get_property(parent, rprop, &rlen);
- if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
- debug("no ranges; cannot translate\n");
- return 1;
- }
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("empty ranges; 1:1 translation\n");
There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
the following if statement in case of null ranges. Therefore one of
the two checks is useless.
2 The implementation of the of_translate_one function found in the
common/fdt_support.c file has removed this check while keeping the one
about the 1:1 translation.
The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.
The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-29 23:16:21 +00:00
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/**
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* @dm_flags: additional flags for Driver Model
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*
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* See &enum gd_dm_flags
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*/
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unsigned long dm_flags;
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2020-10-05 06:30:09 +00:00
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/**
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* @dm_root: root instance for Driver Model
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*/
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struct udevice *dm_root;
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/**
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* @dm_root_f: pre-relocation root instance
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*/
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struct udevice *dm_root_f;
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/**
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2021-01-24 20:48:00 +00:00
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* @uclass_root_s:
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* head of core tree when uclasses are not in read-only memory.
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*
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* When uclasses are in read-only memory, @uclass_root_s is not used and
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* @uclass_root points to the root node generated by dtoc.
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2020-10-05 06:30:09 +00:00
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*/
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2020-12-19 17:40:17 +00:00
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struct list_head uclass_root_s;
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/**
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2021-01-24 20:48:00 +00:00
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* @uclass_root:
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* pointer to head of core tree, if uclasses are in read-only memory and
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* cannot be adjusted to use @uclass_root as a list head.
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*
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* When not in read-only memory, @uclass_root_s is used to hold the
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* uclass root, and @uclass_root points to the address of
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* @uclass_root_s.
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2020-12-19 17:40:17 +00:00
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*/
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struct list_head *uclass_root;
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2020-10-03 17:31:33 +00:00
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# if CONFIG_IS_ENABLED(OF_PLATDATA)
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2020-11-30 00:07:05 +00:00
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/** @dm_driver_rt: Dynamic info about the driver */
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2020-10-03 17:31:33 +00:00
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struct driver_rt *dm_driver_rt;
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# endif
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2014-02-26 22:59:18 +00:00
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#endif
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2015-10-09 05:46:34 +00:00
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#ifdef CONFIG_TIMER
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2020-10-05 06:30:09 +00:00
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/**
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* @timer: timer instance for Driver Model
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*/
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struct udevice *timer;
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2015-10-09 05:46:34 +00:00
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#endif
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2020-10-05 06:30:09 +00:00
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/**
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* @fdt_blob: U-Boot's own device tree, NULL if none
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*/
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const void *fdt_blob;
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/**
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* @new_fdt: relocated device tree
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*/
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void *new_fdt;
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/**
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* @fdt_size: space reserved for relocated device space
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*/
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unsigned long fdt_size;
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2020-10-03 15:25:22 +00:00
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#if CONFIG_IS_ENABLED(OF_LIVE)
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2020-10-05 06:30:09 +00:00
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/**
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* @of_root: root node of the live tree
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*/
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2017-05-19 02:08:53 +00:00
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struct device_node *of_root;
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#endif
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2018-12-07 13:50:52 +00:00
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#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
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2020-10-05 06:30:09 +00:00
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/**
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* @multi_dtb_fit: pointer to uncompressed multi-dtb FIT image
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*/
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const void *multi_dtb_fit;
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2018-12-07 13:50:52 +00:00
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#endif
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2020-10-05 06:30:09 +00:00
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/**
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* @jt: jump table
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*
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* The jump table contains pointers to exported functions. A pointer to
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* the jump table is passed to standalone applications.
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*/
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struct jt_funcs *jt;
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/**
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* @env_buf: buffer for env_get() before reloc
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*/
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char env_buf[32];
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2013-06-11 18:14:42 +00:00
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#ifdef CONFIG_TRACE
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2020-10-05 06:30:09 +00:00
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/**
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* @trace_buff: trace buffer
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*
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* When tracing function in U-Boot this field points to the buffer
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* recording the function calls.
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*/
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void *trace_buff;
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2012-01-16 21:12:23 +00:00
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#endif
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#if defined(CONFIG_SYS_I2C)
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2020-10-05 06:30:09 +00:00
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/**
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* @cur_i2c_bus: currently used I2C bus
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*/
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int cur_i2c_bus;
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2013-06-11 18:14:42 +00:00
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#endif
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2020-10-05 06:30:09 +00:00
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/**
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* @timebase_h: high 32 bits of timer
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*/
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2017-05-09 02:32:03 +00:00
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unsigned int timebase_h;
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2020-10-05 06:30:09 +00:00
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/**
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* @timebase_l: low 32 bits of timer
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*/
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2017-05-09 02:32:03 +00:00
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unsigned int timebase_l;
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2017-07-24 09:43:34 +00:00
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#if CONFIG_VAL(SYS_MALLOC_F_LEN)
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2020-10-05 06:30:09 +00:00
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/**
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* @malloc_base: base address of early malloc()
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*/
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unsigned long malloc_base;
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/**
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* @malloc_limit: limit address of early malloc()
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*/
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unsigned long malloc_limit;
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/**
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* @malloc_ptr: current address of early malloc()
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*/
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unsigned long malloc_ptr;
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2014-12-30 14:53:21 +00:00
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#endif
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#ifdef CONFIG_PCI
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2020-10-05 06:30:09 +00:00
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/**
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* @hose: PCI hose for early use
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*/
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struct pci_controller *hose;
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/**
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* @pci_ram_top: top of region accessible to PCI
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*/
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phys_addr_t pci_ram_top;
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2014-12-30 14:53:21 +00:00
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#endif
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#ifdef CONFIG_PCI_BOOTDELAY
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2020-10-05 06:30:09 +00:00
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/**
|
|
|
|
* @pcidelay_done: delay time before scanning of PIC hose expired
|
|
|
|
*
|
|
|
|
* If CONFIG_PCI_BOOTDELAY=y, pci_hose_scan() waits for the number of
|
|
|
|
* milliseconds defined by environment variable pcidelay before
|
|
|
|
* scanning. Once this delay has expired the flag @pcidelay_done
|
|
|
|
* is set to 1.
|
|
|
|
*/
|
2014-12-30 14:53:21 +00:00
|
|
|
int pcidelay_done;
|
2014-07-11 04:23:28 +00:00
|
|
|
#endif
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @cur_serial_dev: current serial device
|
|
|
|
*/
|
|
|
|
struct udevice *cur_serial_dev;
|
|
|
|
/**
|
|
|
|
* @arch: architecture-specific data
|
|
|
|
*/
|
|
|
|
struct arch_global_data arch;
|
2015-11-09 06:47:48 +00:00
|
|
|
#ifdef CONFIG_CONSOLE_RECORD
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @console_out: output buffer for console recording
|
|
|
|
*
|
|
|
|
* This buffer is used to collect output during console recording.
|
|
|
|
*/
|
|
|
|
struct membuff console_out;
|
|
|
|
/**
|
|
|
|
* @console_in: input buffer for console recording
|
|
|
|
*
|
|
|
|
* If console recording is activated, this buffer can be used to
|
|
|
|
* emulate input.
|
|
|
|
*/
|
|
|
|
struct membuff console_in;
|
2015-11-09 06:47:48 +00:00
|
|
|
#endif
|
2016-01-19 02:52:21 +00:00
|
|
|
#ifdef CONFIG_DM_VIDEO
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @video_top: top of video frame buffer area
|
|
|
|
*/
|
|
|
|
ulong video_top;
|
|
|
|
/**
|
|
|
|
* @video_bottom: bottom of video frame buffer area
|
|
|
|
*/
|
|
|
|
ulong video_bottom;
|
2016-01-19 02:52:21 +00:00
|
|
|
#endif
|
2017-05-22 11:05:25 +00:00
|
|
|
#ifdef CONFIG_BOOTSTAGE
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @bootstage: boot stage information
|
|
|
|
*/
|
|
|
|
struct bootstage_data *bootstage;
|
|
|
|
/**
|
|
|
|
* @new_bootstage: relocated boot stage information
|
|
|
|
*/
|
|
|
|
struct bootstage_data *new_bootstage;
|
2017-05-22 11:05:25 +00:00
|
|
|
#endif
|
2017-12-04 20:48:24 +00:00
|
|
|
#ifdef CONFIG_LOG
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @log_drop_count: number of dropped log messages
|
|
|
|
*
|
|
|
|
* This counter is incremented for each log message which can not
|
|
|
|
* be processed because logging is not yet available as signaled by
|
|
|
|
* flag %GD_FLG_LOG_READY in @flags.
|
|
|
|
*/
|
|
|
|
int log_drop_count;
|
|
|
|
/**
|
|
|
|
* @default_log_level: default logging level
|
|
|
|
*
|
|
|
|
* For logging devices without filters @default_log_level defines the
|
|
|
|
* logging level, cf. &enum log_level_t.
|
|
|
|
*/
|
|
|
|
int default_log_level;
|
|
|
|
/**
|
|
|
|
* @log_head: list of logging devices
|
|
|
|
*/
|
|
|
|
struct list_head log_head;
|
|
|
|
/**
|
|
|
|
* @log_fmt: bit mask for logging format
|
|
|
|
*
|
|
|
|
* The @log_fmt bit mask selects the fields to be shown in log messages.
|
|
|
|
* &enum log_fmt defines the bits of the bit mask.
|
|
|
|
*/
|
|
|
|
int log_fmt;
|
2020-10-17 12:31:57 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @processing_msg: a log message is being processed
|
|
|
|
*
|
|
|
|
* This flag is used to suppress the creation of additional messages
|
|
|
|
* while another message is being processed.
|
|
|
|
*/
|
|
|
|
bool processing_msg;
|
2020-10-17 12:31:58 +00:00
|
|
|
/**
|
|
|
|
* @logc_prev: logging category of previous message
|
|
|
|
*
|
|
|
|
* This value is used as logging category for continuation messages.
|
|
|
|
*/
|
|
|
|
int logc_prev;
|
|
|
|
/**
|
2020-10-30 17:50:31 +00:00
|
|
|
* @logl_prev: logging level of the previous message
|
2020-10-17 12:31:58 +00:00
|
|
|
*
|
|
|
|
* This value is used as logging level for continuation messages.
|
|
|
|
*/
|
|
|
|
int logl_prev;
|
2017-12-04 20:48:24 +00:00
|
|
|
#endif
|
2018-11-16 01:43:52 +00:00
|
|
|
#if CONFIG_IS_ENABLED(BLOBLIST)
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @bloblist: blob list information
|
|
|
|
*/
|
|
|
|
struct bloblist_hdr *bloblist;
|
|
|
|
/**
|
|
|
|
* @new_bloblist: relocated blob list information
|
|
|
|
*/
|
|
|
|
struct bloblist_hdr *new_bloblist;
|
2020-11-28 08:43:20 +00:00
|
|
|
#endif
|
|
|
|
#if CONFIG_IS_ENABLED(HANDOFF)
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @spl_handoff: SPL hand-off information
|
|
|
|
*/
|
2018-11-16 01:44:09 +00:00
|
|
|
struct spl_handoff *spl_handoff;
|
2018-11-16 01:43:52 +00:00
|
|
|
#endif
|
2019-04-12 14:42:28 +00:00
|
|
|
#if defined(CONFIG_TRANSLATION_OFFSET)
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @translation_offset: optional translation offset
|
|
|
|
*
|
|
|
|
* See CONFIG_TRANSLATION_OFFSET.
|
|
|
|
*/
|
|
|
|
fdt_addr_t translation_offset;
|
2019-04-12 14:42:28 +00:00
|
|
|
#endif
|
2019-06-09 01:46:21 +00:00
|
|
|
#if CONFIG_IS_ENABLED(WDT)
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* @watchdog_dev: watchdog device
|
|
|
|
*/
|
2019-04-11 13:58:44 +00:00
|
|
|
struct udevice *watchdog_dev;
|
|
|
|
#endif
|
2020-11-04 16:57:19 +00:00
|
|
|
#ifdef CONFIG_GENERATE_ACPI_TABLE
|
|
|
|
/**
|
|
|
|
* @acpi_ctx: ACPI context pointer
|
|
|
|
*/
|
|
|
|
struct acpi_ctx *acpi_ctx;
|
|
|
|
#endif
|
2021-02-05 04:17:20 +00:00
|
|
|
#if CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)
|
|
|
|
/**
|
|
|
|
* @smbios_version: Points to SMBIOS type 0 version
|
|
|
|
*/
|
|
|
|
char *smbios_version;
|
|
|
|
#endif
|
2020-10-05 06:30:09 +00:00
|
|
|
};
|
2012-12-13 20:49:12 +00:00
|
|
|
|
2020-10-05 06:30:09 +00:00
|
|
|
/**
|
|
|
|
* gd_board_type() - retrieve board type
|
|
|
|
*
|
|
|
|
* Return: global board type
|
|
|
|
*/
|
2017-03-31 14:40:24 +00:00
|
|
|
#ifdef CONFIG_BOARD_TYPES
|
|
|
|
#define gd_board_type() gd->board_type
|
|
|
|
#else
|
|
|
|
#define gd_board_type() 0
|
|
|
|
#endif
|
|
|
|
|
2020-10-03 15:25:22 +00:00
|
|
|
/* These macros help avoid #ifdefs in the code */
|
|
|
|
#if CONFIG_IS_ENABLED(OF_LIVE)
|
|
|
|
#define gd_of_root() gd->of_root
|
|
|
|
#define gd_of_root_ptr() &gd->of_root
|
|
|
|
#define gd_set_of_root(_root) gd->of_root = (_root)
|
|
|
|
#else
|
|
|
|
#define gd_of_root() NULL
|
|
|
|
#define gd_of_root_ptr() NULL
|
|
|
|
#define gd_set_of_root(_root)
|
|
|
|
#endif
|
|
|
|
|
2020-10-03 17:31:33 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
|
|
#define gd_set_dm_driver_rt(dyn) gd->dm_driver_rt = dyn
|
|
|
|
#define gd_dm_driver_rt() gd->dm_driver_rt
|
|
|
|
#else
|
|
|
|
#define gd_set_dm_driver_rt(dyn)
|
|
|
|
#define gd_dm_driver_rt() NULL
|
|
|
|
#endif
|
|
|
|
|
2020-11-04 16:57:19 +00:00
|
|
|
#ifdef CONFIG_GENERATE_ACPI_TABLE
|
|
|
|
#define gd_acpi_ctx() gd->acpi_ctx
|
|
|
|
#else
|
|
|
|
#define gd_acpi_ctx() NULL
|
|
|
|
#endif
|
|
|
|
|
fdt: translate address if #size-cells = <0>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.
The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.
The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:
+
ranges = of_get_property(parent, rprop, &rlen);
- if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
- debug("no ranges; cannot translate\n");
- return 1;
- }
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("empty ranges; 1:1 translation\n");
There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
the following if statement in case of null ranges. Therefore one of
the two checks is useless.
2 The implementation of the of_translate_one function found in the
common/fdt_support.c file has removed this check while keeping the one
about the 1:1 translation.
The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.
The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-29 23:16:21 +00:00
|
|
|
#if CONFIG_IS_ENABLED(DM)
|
|
|
|
#define gd_size_cells_0() (gd->dm_flags & GD_DM_FLG_SIZE_CELLS_0)
|
|
|
|
#else
|
|
|
|
#define gd_size_cells_0() (0)
|
|
|
|
#endif
|
|
|
|
|
2020-10-05 06:30:08 +00:00
|
|
|
/**
|
|
|
|
* enum gd_flags - global data flags
|
|
|
|
*
|
|
|
|
* See field flags of &struct global_data.
|
2012-12-13 20:49:12 +00:00
|
|
|
*/
|
2020-10-05 06:30:08 +00:00
|
|
|
enum gd_flags {
|
|
|
|
/**
|
|
|
|
* @GD_FLG_RELOC: code was relocated to RAM
|
|
|
|
*/
|
|
|
|
GD_FLG_RELOC = 0x00001,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_DEVINIT: devices have been initialized
|
|
|
|
*/
|
|
|
|
GD_FLG_DEVINIT = 0x00002,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SILENT: silent mode
|
|
|
|
*/
|
|
|
|
GD_FLG_SILENT = 0x00004,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_POSTFAIL: critical POST test failed
|
|
|
|
*/
|
|
|
|
GD_FLG_POSTFAIL = 0x00008,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_POSTSTOP: POST sequence aborted
|
|
|
|
*/
|
|
|
|
GD_FLG_POSTSTOP = 0x00010,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_LOGINIT: log Buffer has been initialized
|
|
|
|
*/
|
|
|
|
GD_FLG_LOGINIT = 0x00020,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_DISABLE_CONSOLE: disable console (in & out)
|
|
|
|
*/
|
|
|
|
GD_FLG_DISABLE_CONSOLE = 0x00040,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_ENV_READY: environment imported into hash table
|
|
|
|
*/
|
|
|
|
GD_FLG_ENV_READY = 0x00080,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SERIAL_READY: pre-relocation serial console ready
|
|
|
|
*/
|
|
|
|
GD_FLG_SERIAL_READY = 0x00100,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_FULL_MALLOC_INIT: full malloc() is ready
|
|
|
|
*/
|
|
|
|
GD_FLG_FULL_MALLOC_INIT = 0x00200,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SPL_INIT: spl_init() has been called
|
|
|
|
*/
|
|
|
|
GD_FLG_SPL_INIT = 0x00400,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SKIP_RELOC: don't relocate
|
|
|
|
*/
|
|
|
|
GD_FLG_SKIP_RELOC = 0x00800,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_RECORD: record console
|
|
|
|
*/
|
|
|
|
GD_FLG_RECORD = 0x01000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_ENV_DEFAULT: default variable flag
|
|
|
|
*/
|
|
|
|
GD_FLG_ENV_DEFAULT = 0x02000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SPL_EARLY_INIT: early SPL initialization is done
|
|
|
|
*/
|
|
|
|
GD_FLG_SPL_EARLY_INIT = 0x04000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_LOG_READY: log system is ready for use
|
|
|
|
*/
|
|
|
|
GD_FLG_LOG_READY = 0x08000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_WDT_READY: watchdog is ready for use
|
|
|
|
*/
|
|
|
|
GD_FLG_WDT_READY = 0x10000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SKIP_LL_INIT: don't perform low-level initialization
|
|
|
|
*/
|
|
|
|
GD_FLG_SKIP_LL_INIT = 0x20000,
|
|
|
|
/**
|
|
|
|
* @GD_FLG_SMP_READY: SMP initialization is complete
|
|
|
|
*/
|
|
|
|
GD_FLG_SMP_READY = 0x40000,
|
|
|
|
};
|
|
|
|
|
fdt: translate address if #size-cells = <0>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.
The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.
The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:
+
ranges = of_get_property(parent, rprop, &rlen);
- if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
- debug("no ranges; cannot translate\n");
- return 1;
- }
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("empty ranges; 1:1 translation\n");
There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
the following if statement in case of null ranges. Therefore one of
the two checks is useless.
2 The implementation of the of_translate_one function found in the
common/fdt_support.c file has removed this check while keeping the one
about the 1:1 translation.
The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.
The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-29 23:16:21 +00:00
|
|
|
/**
|
|
|
|
* enum gd_dm_flags - global data flags for Driver Model
|
|
|
|
*
|
|
|
|
* See field dm_flags of &struct global_data.
|
|
|
|
*/
|
|
|
|
enum gd_dm_flags {
|
|
|
|
/**
|
|
|
|
* @GD_DM_FLG_SIZE_CELLS_0: Enable #size-cells=<0> translation
|
|
|
|
*/
|
|
|
|
GD_DM_FLG_SIZE_CELLS_0 = 0x00001,
|
|
|
|
};
|
|
|
|
|
2020-10-05 06:30:08 +00:00
|
|
|
#endif /* __ASSEMBLY__ */
|
2012-12-13 20:49:12 +00:00
|
|
|
|
|
|
|
#endif /* __ASM_GENERIC_GBL_DATA_H */
|