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u-boot/configs/phycore_pcl063_defconfig

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imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=8
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-30 17:50:32 +00:00
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x90000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_ENV_SIZE=0x4000
arm: mx6: Make all i.MX6 SoCs user-selectable We have a number of platforms that are a combination of a carrier board and System-on-Module (SoM) that in turn allows for the board to have different SoCs on it. In some cases, this is handled via board-specific Kconfig options. In other cases we make use of CONFIG_SYS_EXTRA_OPTIONS. This latter case however can lead to invalid configurations as we will not in turn get options that in Kconfig are selected by or depend on that setting. To resolve this, make the SoC option a choice in Kconfig and make boards depend on what they can support. This change opens us up for further clean-ups in the cases where a single CONFIG_TARGET_xxx can support different SoCs and today they do not, or do not cleanly do so. Reported-by: Matt Porter <mporter@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Soeren Moch <smoch@web.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Heiko Schocher <hs@denx.de> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ian Ray <ian.ray@ge.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Cc: Simone CIANNI <simone.cianni@bticino.it> Cc: Adam Ford <aford173@gmail.com> Cc: Marcin Niestroj <m.niestroj@grinn-global.com> Cc: "Eric Bénard" <eric@eukrea.com> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Cc: Eric Nelson <eric@nelint.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Parthiban Nallathambi <parthiban@linumiz.com> Cc: Marek Vasut <marex@denx.de> Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Niel Fourie <lusus@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Richard Hu <richard.hu@technexion.com> Cc: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com> Cc: Breno Lima <breno.lima@nxp.com> Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org> Cc: Silvio Fricke <open-source@softing.de> Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-18 11:43:50 +00:00
CONFIG_MX6UL=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_TARGET_PCL063=y
Convert CONFIG_SYS_MALLOC_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_MALLOC_LEN Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-29 01:34:49 +00:00
CONFIG_SYS_MALLOC_LEN=0x1000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:54:25 +00:00
CONFIG_SPL_TEXT_BASE=0x00909000
mmc: Rename MMC_SUPPORT to MMC Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: Fixup some incorrect renames] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-08 18:20:09 +00:00
CONFIG_SPL_MMC=y
serial: Rename SERIAL_SUPPORT to SERIAL Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:12 +00:00
CONFIG_SPL_SERIAL=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:29 +00:00
CONFIG_SPL_USB_HOST=y
Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOG Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:28 +00:00
CONFIG_SPL_WATCHDOG=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_CACHE=y
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="gpmi-nand:4m(uboot),1m(env),-(root)"
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
Convert CONFIG_ENV_OVERWRITE to Kconfig This converts the following to Kconfig: CONFIG_ENV_OVERWRITE Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rerun migration, remove some comments] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-03 11:48:56 +00:00
CONFIG_ENV_OVERWRITE=y
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_MXC=y
Convert CONFIG_FSL_USDHC to Kconfig This converts the following to Kconfig: CONFIG_FSL_USDHC Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-14 12:23:43 +00:00
CONFIG_FSL_USDHC=y
mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD Like in Linux, just use CONFIG_MTD to compile the MTD stack. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-03 17:50:05 +00:00
CONFIG_MTD=y
mtd: rename CONFIG_MTD -> CONFIG_DM_MTD CONFIG_MTD must be reserved for the MTD core. Like any other subsystem, prefix the symbol by DM when it comes to DM support. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> [trini: Add Kconfig files] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-03 17:50:04 +00:00
CONFIG_DM_MTD=y
mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-03 17:50:03 +00:00
CONFIG_MTD_RAW_NAND=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns that you shouldn't select both of them due to a device ID clash between the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately boards like the SAMA5D3xEK do contain both types of PHY, but fortunately the Linux Micrel PHY driver provides a solution by using different PHY ID and mask values to distinguish these chips. This commit contains the following changes: - The PHY ID and mask values for the KSZ9021 and the KS8721 now match those used by the Linux driver. - The warnings about not enabling both drivers have been removed. - The description for PHY_MICREL_KSZ8XXX has been corrected (these are 10/100 PHYs, not GbE PHYs). - PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE since this is selected by PHY_MICREL_KSZ90X1. - All of the relevant defconfig files have been updated now that PHY_MICREL_KSZ8XXX does not default to 'Y'. Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-03-06 12:48:27 +00:00
CONFIG_PHY_MICREL_KSZ8XXX=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_MXC_UART=y
configs: migrate CONFIG_IMX_THERMAL to defconfigs Done via moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-30 01:22:03 +00:00
CONFIG_IMX_THERMAL=y
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-11 11:34:46 +00:00
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Phytec"
CONFIG_USB_GADGET_VENDOR_NUM=0x01b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
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