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u-boot/drivers/timer/Makefile

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
# SPDX-License-Identifier: GPL-2.0+
dm: implement a Timer uclass Implement a Timer uclass to work with lib/time.c. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
2015-10-09 05:46:34 +00:00
#
# Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
dm: timer: normalise SPL and TPL support To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28 15:38:42 +00:00
obj-y += timer-uclass.o
nios2: convert altera timer to driver model Convert altera timer to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com>
2015-10-22 14:28:53 +00:00
obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode The Andes PLMT driver directly accesses the mtime MMIO region, indicating its intended use in the M-mode boot stage. However, since U-Boot proper (S-mode) also uses the PLMT driver, we need to specifically mark the region as readable through PMPCFGx (or S/U-mode read-only shared data region for Smepmp) in OpenSBI. Granting permission for this case doesn't make sense. Instead, we should use the generic RISC-V timer driver to read the mtime through the TIME CSR. Therefore, we add the SPL_ANDES_PLMT_TIMER config, which ensures that the PLMT driver is linked exclusively against M-mode U-Boot or U-Boot SPL binaries. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-09-29 04:03:07 +00:00
obj-$(CONFIG_$(SPL_)ANDES_PLMT_TIMER) += andes_plmt_timer.o
timer: Sort Makefile entries Makefile entries should be sorted. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-06 08:23:37 +00:00
obj-$(CONFIG_ARC_TIMER) += arc_timer.o
zynq: Convert arm twd timer to DM driver Move arm twd timer driver from zynq to generic location. DM timer drivers are designed differently to original driver. Timer is counting up and not down. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-08-05 06:16:28 +00:00
obj-$(CONFIG_ARM_TWD_TIMER) += arm_twd_timer.o
timer: Sort Makefile entries Makefile entries should be sorted. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-06 08:23:37 +00:00
obj-$(CONFIG_AST_TIMER) += ast_timer.o
timers: atmel_pit: introduce CONFIG_SPL_ATMEL_PIT_TIMER This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be selected in u-boot proper. The SPL can use a different timer. By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL decreases by 0.3 KBytes. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-04-04 08:35:51 +00:00
obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
timers: atmel_tcb: introduce CONFIG_SPL_ATMEL_TCB This commit allows the ATMEL_TCB driver to be unselected in SPL and be selected in u-boot proper. The SPL can use a different timer. By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL decreases by 1 KByte. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-04-04 08:35:50 +00:00
obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
timer: Add Cadence TTC timer counter support This driver was tested on Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-17 11:40:46 +00:00
obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
timer: dw-apb: Add Designware APB timer driver Add timer driver for the Designware APB Timer IP. This is present for example on the Altera SoCFPGA chips. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-18 13:58:32 +00:00
obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
timer: fttmr010: return a previously deleted driver now ported to DM The fttmr010 timer driver was deleted by commit 29fc6f24926e ("ARM: remove a320evb board support") The original source file was: arch/arm/cpu/arm920t/a320/timer.c Return the driver to the codebase in a DM compatible form. A platform using fttmr010 will be submitted later. This hardware is described in the datasheet [1], starting from page 348. According to the datasheet, there is a Revision Register at offset 0x3C, which is not present in 'struct fttmr010'. Add it and debug() print revision in probe function. [1] https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf Signed-off-by: Sergei Antonov <saproj@gmail.com>
2023-02-13 17:34:36 +00:00
obj-$(CONFIG_FTTMR010_TIMER) += fttmr010_timer.o
timer: gxp: Add HPE GXP timer support Add support for the HPE GXP SOC timer. The GXP supports several different kinds of timers but for the purpose of this driver there is only support for the General Timer. The timer has a 1us resolution and is 56 bits. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-08 21:21:35 +00:00
obj-$(CONFIG_GXP_TIMER) += gxp-timer.o
timer: Add MPC83xx timer driver Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-06 08:23:38 +00:00
obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
timer: Add driver for Nomadik Multi Timer Unit (MTU) The Nomadik Multi Timer Unit (MTU) provides 4 decrementing free-running timers. It is used in ST-Ericsson Ux500 SoCs. The driver uses the first timer to implement UCLASS_TIMER. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-04 17:45:15 +00:00
obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o
timer: npcm: Add NPCM timer support Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2022-04-19 05:32:22 +00:00
obj-$(CONFIG_NPCM_TIMER) += npcm-timer.o
drivers: timer: omap_timer: add timer driver for omap devices based on dm Adding a timer driver for omap devices based on driver model and device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-12-24 10:38:07 +00:00
obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
timer: add orion-timer support Add timer support for Kirkwood and MVEBU devices. Cc: Pali Rohár <pali@kernel.org> Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-17 19:37:51 +00:00
obj-$(CONFIG_ORION_TIMER) += orion-timer.o
timer: renesas: Add RZ/A1 R7S72100 OSTM timer driver Add OSTM timer driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-04 15:30:58 +00:00
obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
timer: Add generic driver for RISC-V privileged architecture defined timer RISC-V privileged architecture v1.10 defines a real-time counter, exposed as a memory-mapped machine-mode register - mtime. mtime must run at constant frequency, and the platform must provide a mechanism for determining the timebase of mtime. The mtime register has a 64-bit precision on all RV32, RV64, and RV128 systems. Different platform may have different implementation of the mtime block hence an API riscv_get_time() is required by this driver for platform codes to hide such implementation details. For example, on some platforms mtime is provided by the CLINT module, while on some other platforms a simple 'rdtime' can be used to get the timer counter. With this timer driver the U-Boot timer functionalities like delay works correctly now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-12 14:12:27 +00:00
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
rockchip: timer: add device-model timer driver for RK3368 (and similar) This adds a device-model driver for the timer block in the RK3368 (and similar devices that share the same timer block, such as the RK3288) for the down-counting (i.e. non-secure) timers. This allows us to configure U-Boot for the RK3368 in such a way that we can run with the secure timer inaccessible or uninitialised (note that the ARMv8 generic timer does not count, if the secure timer is not enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28 15:43:19 +00:00
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
timer: Sort Makefile entries Makefile entries should be sorted. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-06 08:23:37 +00:00
obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
timer: add SP804 UCLASS timer driver The "Arm Ltd. Dual-Timer Module (SP804)" is a simple 32-bit count-down timer IP with interrupt functionality, and is used in some SoCs from various vendors. Add a simple DM compliant timer driver, to allow users of the SP804 to switch to DM_TIMER. This relies on the input clock to be accessible via the DM clock framework, which should be fine as we probably look at fixed-clock's here anyway. We re-program the control register in the probe() function, but keep the divider in place, in case this has been set to something on purpose before. The TRM for the timer IP can be found here: https://developer.arm.com/documentation/ddi0271/latest Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-20 22:10:23 +00:00
obj-$(CONFIG_SP804_TIMER) += sp804_timer.o
riscv: Rename SiFive CLINT to RISC-V ALINT As the RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V ALINT in the source tree to be future-proof. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
2023-06-21 15:11:46 +00:00
obj-$(CONFIG_$(SPL_)RISCV_ACLINT) += riscv_aclint_timer.o
timer: sti: convert sti-timer to arm a9 global timer STI timer is actually ARM Cortex A9 global timer. Convert the driver to use generic global timer name and make it consistent with Linux kernel global timer driver. This also allows any A9 based device to use this driver. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-08-24 04:44:32 +00:00
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
timer: stm32: Add timer support for STM32 SoCs family This timer driver is using GPT Timer (General Purpose Timer) available on all STM32 SOCs family. This driver can be used on STM32F4/F7 and H7 SoCs family Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-02-07 09:44:45 +00:00
obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
drivers: timer: add driver for ARMv7 based Tegra devices and T210 Add timer support for T20/T30/T114/T124 and T210 based devices. Driver is based on DM, has device tree support and can be used on SPL and early boot stage. Arm64 Tegra (apart T210) according to comment in tegra-common.h use architected timer. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30 Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-01 08:53:02 +00:00
obj-$(CONFIG_TEGRA_TIMER) += tegra-timer.o
timer: Sort Makefile entries Makefile entries should be sorted. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-06 08:23:37 +00:00
obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
timer: MediaTek: add timer driver for MediaTek SoCs This patch adds clock source and clock event for the timer found on the Mediatek SoCs. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-15 02:07:56 +00:00
obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
timer: mchp-pit64b: add support for pit64b Add support for Microchip PIT64B timer. The timer is 64 bit length and is used as a free running counter (in continuous mode with highest values for period registers). The clock feeding the timer would be no more than 12.5MHz. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-09-07 15:36:33 +00:00
obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o
timer: imx-gpt: Add timer support for i.MX SoCs family This timer driver uses GPT Timer (General Purpose Timer) available on a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator as well as peripheral clock. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> [Giulio: added the driver's stub and handled peripheral clock prescaler setting making driver to work correctly] Signed-off-by: Jesse Taube <mr.bossman075@gmail.com> [Jesse: added init, setting prescaler for 24Mhz support and enabling timer]
2021-05-13 10:18:31 +00:00
obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o
microblaze: Convert axi timer to DM driver Move axi timer driver from Microblaze to generic location. Origin implementation was irq based with counting down timer. CONFIG_TIMER drivers are designed differently that timer is free running up timer with automatic reload without any interrupt. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Michal Simek <michal.simek@amd.com> Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
2022-06-24 12:16:32 +00:00
obj-$(CONFIG_XILINX_TIMER) += xilinx-timer.o
timer: starfive: Add Starfive timer support Add timer driver in Starfive SoC. It is an timer that outside of CPU core and inside Starfive SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com> Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-19 07:30:36 +00:00
obj-$(CONFIG_STARFIVE_TIMER) += starfive-timer.o
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