2021-03-15 22:24:05 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
/*
|
|
|
|
* Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
|
|
|
|
*
|
2023-01-26 20:01:32 +00:00
|
|
|
* Copyright (C) 2019 Renesas Electronics Corp.
|
2021-03-15 22:24:05 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Silicon Linux sub board for CAT874 (CAT875)";
|
|
|
|
|
|
|
|
aliases {
|
|
|
|
ethernet0 = &avb;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&avb {
|
|
|
|
pinctrl-0 = <&avb_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
renesas,no-ether-link;
|
|
|
|
phy-handle = <&phy0>;
|
2023-01-26 20:01:32 +00:00
|
|
|
phy-mode = "rgmii-id";
|
2021-03-15 22:24:05 +00:00
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
phy0: ethernet-phy@0 {
|
2023-01-26 20:01:32 +00:00
|
|
|
compatible = "ethernet-phy-id001c.c915",
|
|
|
|
"ethernet-phy-ieee802.3-c22";
|
2021-03-15 22:24:05 +00:00
|
|
|
reg = <0>;
|
|
|
|
interrupt-parent = <&gpio2>;
|
|
|
|
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&can0 {
|
|
|
|
pinctrl-0 = <&can0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&can1 {
|
|
|
|
pinctrl-0 = <&can1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pciec0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pfc {
|
|
|
|
avb_pins: avb {
|
|
|
|
mux {
|
|
|
|
groups = "avb_mii";
|
|
|
|
function = "avb";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
can0_pins: can0 {
|
|
|
|
groups = "can0_data";
|
|
|
|
function = "can0";
|
|
|
|
};
|
|
|
|
|
|
|
|
can1_pins: can1 {
|
|
|
|
groups = "can1_data";
|
|
|
|
function = "can1";
|
|
|
|
};
|
|
|
|
};
|