2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
2002-10-21 17:04:47 +00:00
|
|
|
/*
|
2010-07-24 18:22:02 +00:00
|
|
|
* (C) Copyright 2002-2010
|
2002-10-21 17:04:47 +00:00
|
|
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __ASM_GBL_DATA_H
|
|
|
|
#define __ASM_GBL_DATA_H
|
2012-12-13 20:48:30 +00:00
|
|
|
|
2021-02-23 06:34:37 +00:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
2021-06-03 13:39:02 +00:00
|
|
|
#include <config.h>
|
|
|
|
|
2020-10-31 03:38:53 +00:00
|
|
|
#include <asm/types.h>
|
|
|
|
#include <linux/types.h>
|
|
|
|
|
2012-12-13 20:48:30 +00:00
|
|
|
/* Architecture-specific global data */
|
|
|
|
struct arch_global_data {
|
2019-06-21 03:42:28 +00:00
|
|
|
#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
|
2012-12-13 20:49:05 +00:00
|
|
|
u32 sdhc_clk;
|
|
|
|
#endif
|
2014-09-25 05:52:25 +00:00
|
|
|
|
2019-12-19 10:59:28 +00:00
|
|
|
#if defined(CONFIG_FSL_ESDHC)
|
|
|
|
u32 sdhc_per_clk;
|
|
|
|
#endif
|
|
|
|
|
2014-09-25 05:52:25 +00:00
|
|
|
#if defined(CONFIG_U_QE)
|
|
|
|
u32 qe_clk;
|
|
|
|
u32 brg_clk;
|
|
|
|
uint mp_alloc_base;
|
|
|
|
uint mp_alloc_top;
|
|
|
|
#endif /* CONFIG_U_QE */
|
|
|
|
|
2012-12-13 20:48:31 +00:00
|
|
|
#ifdef CONFIG_AT91FAMILY
|
|
|
|
/* "static data" needed by at91's clock.c */
|
|
|
|
unsigned long cpu_clk_rate_hz;
|
|
|
|
unsigned long main_clk_rate_hz;
|
|
|
|
unsigned long mck_rate_hz;
|
|
|
|
unsigned long plla_rate_hz;
|
|
|
|
unsigned long pllb_rate_hz;
|
|
|
|
unsigned long at91_pllb_usb_init;
|
|
|
|
#endif
|
2012-12-13 20:48:32 +00:00
|
|
|
/* "static data" needed by most of timer.c on ARM platforms */
|
|
|
|
unsigned long timer_rate_hz;
|
2017-05-09 02:32:02 +00:00
|
|
|
unsigned int tbu;
|
|
|
|
unsigned int tbl;
|
2012-12-13 20:48:35 +00:00
|
|
|
unsigned long lastinc;
|
2012-12-13 20:48:36 +00:00
|
|
|
unsigned long long timer_reset_value;
|
2019-05-03 13:41:00 +00:00
|
|
|
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
|
2012-12-13 20:48:39 +00:00
|
|
|
unsigned long tlb_addr;
|
2016-03-04 00:09:47 +00:00
|
|
|
unsigned long tlb_size;
|
2016-03-04 00:09:54 +00:00
|
|
|
#if defined(CONFIG_ARM64)
|
2016-03-04 00:09:47 +00:00
|
|
|
unsigned long tlb_fillptr;
|
|
|
|
unsigned long tlb_emerg;
|
2015-10-14 16:55:45 +00:00
|
|
|
#endif
|
2012-12-13 20:48:39 +00:00
|
|
|
#endif
|
2016-06-24 23:46:18 +00:00
|
|
|
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
|
|
|
|
#define MEM_RESERVE_SECURE_SECURED 0x1
|
|
|
|
#define MEM_RESERVE_SECURE_MAINTAINED 0x2
|
|
|
|
#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
|
|
|
|
/*
|
|
|
|
* Secure memory addr
|
|
|
|
* This variable needs maintenance if the RAM base is not zero,
|
|
|
|
* or if RAM splits into non-consecutive banks. It also has a
|
|
|
|
* flag indicating the secure memory is marked as secure by MMU.
|
|
|
|
* Flags used: 0x1 secured
|
|
|
|
* 0x2 maintained
|
|
|
|
*/
|
|
|
|
phys_addr_t secure_ram;
|
2016-06-24 23:46:19 +00:00
|
|
|
unsigned long tlb_allocated;
|
2016-06-24 23:46:18 +00:00
|
|
|
#endif
|
2017-03-06 17:02:24 +00:00
|
|
|
#ifdef CONFIG_RESV_RAM
|
|
|
|
/*
|
|
|
|
* Reserved RAM for memory resident, eg. Management Complex (MC)
|
|
|
|
* driver which continues to run after U-Boot exits.
|
|
|
|
*/
|
|
|
|
phys_addr_t resv_ram;
|
|
|
|
#endif
|
2013-04-24 00:41:23 +00:00
|
|
|
|
2017-04-25 04:10:11 +00:00
|
|
|
#ifdef CONFIG_ARCH_OMAP2PLUS
|
2015-07-15 14:02:19 +00:00
|
|
|
u32 omap_boot_device;
|
|
|
|
u32 omap_boot_mode;
|
|
|
|
u8 omap_ch_flags;
|
2013-04-24 00:41:23 +00:00
|
|
|
#endif
|
2015-11-09 11:12:07 +00:00
|
|
|
#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
|
2015-01-06 21:18:49 +00:00
|
|
|
unsigned long mem2_clk;
|
|
|
|
#endif
|
2018-10-18 12:28:10 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_IMX8
|
|
|
|
struct udevice *scu_dev;
|
|
|
|
#endif
|
2021-08-07 08:00:41 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_IMX8ULP
|
|
|
|
struct udevice *s400_dev;
|
|
|
|
#endif
|
|
|
|
|
2012-12-13 20:48:30 +00:00
|
|
|
};
|
|
|
|
|
2012-12-13 20:49:14 +00:00
|
|
|
#include <asm-generic/global_data.h>
|
2002-10-21 17:04:47 +00:00
|
|
|
|
2021-05-20 11:24:10 +00:00
|
|
|
#if defined(__clang__) || defined(CONFIG_LTO)
|
2014-07-30 19:54:52 +00:00
|
|
|
|
|
|
|
#define DECLARE_GLOBAL_DATA_PTR
|
|
|
|
#define gd get_gd()
|
|
|
|
|
|
|
|
static inline gd_t *get_gd(void)
|
|
|
|
{
|
|
|
|
gd_t *gd_ptr;
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARM64
|
|
|
|
__asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
|
|
|
|
#else
|
|
|
|
__asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return gd_ptr;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
2013-12-14 03:47:35 +00:00
|
|
|
#ifdef CONFIG_ARM64
|
|
|
|
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
|
|
|
|
#else
|
|
|
|
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
|
|
|
|
#endif
|
2014-07-30 19:54:52 +00:00
|
|
|
#endif
|
2002-10-21 17:04:47 +00:00
|
|
|
|
2020-05-26 23:58:30 +00:00
|
|
|
static inline void set_gd(volatile gd_t *gd_ptr)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARM64
|
|
|
|
__asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
|
2021-05-20 11:24:09 +00:00
|
|
|
#elif __ARM_ARCH >= 7
|
2020-05-26 23:58:30 +00:00
|
|
|
__asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
|
2021-05-20 11:24:09 +00:00
|
|
|
#else
|
|
|
|
__asm__ volatile("mov r9, %0\n" : : "r"(gd_ptr));
|
2020-05-26 23:58:30 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2021-02-23 06:34:37 +00:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
2002-10-21 17:04:47 +00:00
|
|
|
#endif /* __ASM_GBL_DATA_H */
|