2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2013-12-02 22:30:58 +00:00
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/*
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* (C) Copyright 2007-2013
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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* Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
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* Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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*
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* Settings for Calao USB-A9263 board
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*
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* U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap
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* installed on board will not be able to load it properly.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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/*
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* Hardware drivers
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*/
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE 0x04000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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2017-07-21 09:07:46 +00:00
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(ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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2013-12-02 22:30:58 +00:00
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
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#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
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#endif
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/* Ethernet */
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#endif
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2017-07-21 09:07:46 +00:00
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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2013-12-02 22:30:58 +00:00
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#define CONFIG_EXTRA_ENV_SETTINGS \
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2017-10-22 21:55:07 +00:00
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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2013-12-02 22:30:58 +00:00
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#endif
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