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u-boot/configs/evb-ast2600_defconfig

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configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SPL_SYS_THUMB_BUILD=y
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_ARCH_ASPEED=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x800
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SYS_TEXT_BASE=0x80000000
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_ASPEED_AST2600=y
CONFIG_TARGET_EVB_AST2600=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb"
serial: Rename SERIAL_SUPPORT to SERIAL Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:12 +00:00
CONFIG_SPL_SERIAL=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SPL_STACK_R_ADDR=0x83000000
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_SPL_SIZE_LIMIT=0x10000
CONFIG_SPL=y
# CONFIG_ARMV7_NONSEC is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-23 14:25:31 +00:00
CONFIG_SYS_LOAD_ADDR=0x83000000
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_FIT=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootm 20100000"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000
CONFIG_SPL_FIT_IMAGE_TINY=y
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_DM_HASH=y
CONFIG_HASH_ASPEED=y
CONFIG_ASPEED_ACRY=y
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ASPEED=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_FTGMAC100=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DM_RESET=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_WDT=y
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_SHA512_ALGO=y
CONFIG_SHA512=y
CONFIG_SHA384=y
configs: aspeed: Add defconfig for AST2600 EVB Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-12-14 05:54:29 +00:00
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
configs: ast2600-evb: Enable SPL FIT support Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-10-27 06:17:33 +00:00
CONFIG_PHANDLE_CHECK_SEQ=y
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