u-boot/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h

/*
 * Copyright 2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __FSL_LS102XA_SOC_H
#define __FSL_LS102XA_SOC_H

unsigned int get_soc_major_rev(void);
int arch_soc_init(void);
int ls102xa_smmu_stream_id_init(void);

#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
void erratum_a010315(void);
#endif

#endif /* __FSL_LS102XA_SOC_H */
arm: ls1021a: merge SoC specific code in a separate file Create a soc.c file to put the code for soc special settings. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2015-12-05 06:59:10 +00:00			`/*`
			`* Copyright 2015 Freescale Semiconductor, Inc.`
			`*`
			`* SPDX-License-Identifier: GPL-2.0+`
			`*/`

			`#ifndef __FSL_LS102XA_SOC_H`
			`#define __FSL_LS102XA_SOC_H`

			`unsigned int get_soc_major_rev(void);`
			`int arch_soc_init(void);`
armv7: ls102xa: Move smmu and stream id initialization into the common soc code The initialization for smmu and stream id is moved into the common soc code. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 2016-02-05 04:48:17 +00:00			`int ls102xa_smmu_stream_id_init(void);`

fsl-layerscape: Add workaround for PCIe erratum A010315 As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 2016-08-02 11:03:27 +00:00			`#ifdef CONFIG_SYS_FSL_ERRATUM_A010315`
			`void erratum_a010315(void);`
			`#endif`

arm: ls1021a: merge SoC specific code in a separate file Create a soc.c file to put the code for soc special settings. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2015-12-05 06:59:10 +00:00			`#endif /* __FSL_LS102XA_SOC_H */`