2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2014-12-10 15:55:51 +00:00
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/*
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* Test-related constants for sandbox
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*
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* Copyright (c) 2014 Google, Inc
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*/
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#ifndef __ASM_TEST_H
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#define __ASM_TEST_H
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/* The sandbox driver always permits an I2C device with this address */
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2015-03-05 19:25:26 +00:00
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#define SANDBOX_I2C_TEST_ADDR 0x59
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#define SANDBOX_PCI_VENDOR_ID 0x1234
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#define SANDBOX_PCI_DEVICE_ID 0x5678
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#define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
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#define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
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2014-12-10 15:55:51 +00:00
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2018-08-03 08:14:53 +00:00
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#define PCI_CAP_ID_PM_OFFSET 0x50
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#define PCI_CAP_ID_EXP_OFFSET 0x60
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#define PCI_CAP_ID_MSIX_OFFSET 0x70
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#define PCI_EXT_CAP_ID_ERR_OFFSET 0x100
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#define PCI_EXT_CAP_ID_VC_OFFSET 0x200
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#define PCI_EXT_CAP_ID_DSN_OFFSET 0x300
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2018-08-03 08:14:46 +00:00
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/* Useful for PCI_VDEVICE() macro */
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#define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID
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#define SWAP_CASE_DRV_DATA 0x55aa
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2015-07-06 18:54:24 +00:00
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#define SANDBOX_CLK_RATE 32768
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2015-07-06 18:54:35 +00:00
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/* System controller driver data */
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enum {
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SYSCON0 = 32,
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SYSCON1,
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SYSCON_COUNT
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};
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2015-04-20 18:37:15 +00:00
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/**
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* sandbox_i2c_set_test_mode() - set test mode for running unit tests
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*
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* See sandbox_i2c_xfer() for the behaviour changes.
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*
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* @bus: sandbox I2C bus to adjust
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* @test_mode: true to select test mode, false to run normally
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*/
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void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode);
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2014-12-10 15:55:51 +00:00
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enum sandbox_i2c_eeprom_test_mode {
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SIE_TEST_MODE_NONE,
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/* Permits read/write of only one byte per I2C transaction */
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SIE_TEST_MODE_SINGLE_BYTE,
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};
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void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
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enum sandbox_i2c_eeprom_test_mode mode);
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void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len);
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2015-04-21 18:57:18 +00:00
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/*
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* sandbox_timer_add_offset()
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*
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* Allow tests to add to the time reported through lib/time.c functions
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* offset: number of milliseconds to advance the system time
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*/
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void sandbox_timer_add_offset(unsigned long offset);
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2015-04-20 18:37:24 +00:00
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/**
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* sandbox_i2c_rtc_set_offset() - set the time offset from system/base time
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*
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* @dev: RTC device to adjust
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* @use_system_time: true to use system time, false to use @base_time
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* @offset: RTC offset from current system/base time (-1 for no
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* change)
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* @return old value of RTC offset
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*/
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long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time,
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int offset);
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/**
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* sandbox_i2c_rtc_get_set_base_time() - get and set the base time
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*
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* @dev: RTC device to adjust
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* @base_time: New base system time (set to -1 for no change)
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* @return old base time
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*/
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long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time);
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2015-11-09 06:48:06 +00:00
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int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str);
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2018-09-27 07:19:31 +00:00
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/**
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* sandbox_osd_get_mem() - get the internal memory of a sandbox OSD
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*
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* @dev: OSD device for which to access the internal memory for
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* @buf: pointer to buffer to receive the OSD memory data
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* @buflen: length of buffer in bytes
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*/
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int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen);
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2018-10-01 18:22:40 +00:00
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/**
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* sandbox_pwm_get_config() - get the PWM config for a channel
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*
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* @dev: Device to check
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* @channel: Channel number to check
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* @period_ns: Period of the PWM in nanoseconds
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* @duty_ns: Current duty cycle of the PWM in nanoseconds
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* @enable: true if the PWM is enabled
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* @polarity: true if the PWM polarity is active high
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* @return 0 if OK, -ENOSPC if the PWM number is invalid
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*/
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int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
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uint *duty_nsp, bool *enablep, bool *polarityp);
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2018-11-06 22:21:41 +00:00
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/**
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* sandbox_sf_set_block_protect() - Set the BP bits of the status register
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*
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* @dev: Device to update
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* @bp_mask: BP bits to set (bits 2:0, so a value of 0 to 7)
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*/
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void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask);
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2014-12-10 15:55:51 +00:00
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#endif
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