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https://github.com/AsahiLinux/u-boot
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dm: sandbox: pci: Add PCI support for sandbox
Add the required header information, device tree nodes and I/O accessor functions to support PCI on sandbox. All devices are emulated by drivers which can be added as required for testing or development. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
ff3e077bd2
commit
9569c40668
9 changed files with 284 additions and 7 deletions
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@ -34,4 +34,11 @@ config DM_I2C
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config DM_TEST
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default y
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config PCI
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bool "PCI support"
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help
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Enable support for PCI (Peripheral Interconnect Bus), a type of bus
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used on some devices to allow the CPU to communicate with its
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peripherals.
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endmenu
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@ -2,7 +2,7 @@
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* Copyright (c) 2011 The Chromium OS Authors.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define DEBUG
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#include <common.h>
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#include <dm/root.h>
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#include <os.h>
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@ -10,6 +10,15 @@
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DECLARE_GLOBAL_DATA_PTR;
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/* Enable access to PCI memory with map_sysmem() */
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static bool enable_pci_map;
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#ifdef CONFIG_PCI
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/* Last device that was mapped into memory, and length of mapping */
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static struct udevice *map_dev;
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unsigned long map_len;
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#endif
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void reset_cpu(ulong ignored)
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{
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if (state_uninit())
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@ -59,9 +68,39 @@ int cleanup_before_linux(void)
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void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
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{
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#ifdef CONFIG_PCI
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unsigned long plen = len;
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void *ptr;
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map_dev = NULL;
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if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
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if (plen != len) {
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printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
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__func__, paddr, len, plen);
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}
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map_len = len;
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return ptr;
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}
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#endif
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return (void *)(gd->arch.ram_buf + paddr);
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}
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void unmap_physmem(const void *vaddr, unsigned long flags)
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{
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#ifdef CONFIG_PCI
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if (map_dev) {
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pci_unmap_physmem(vaddr, map_len, map_dev);
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map_dev = NULL;
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}
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#endif
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}
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void sandbox_set_enable_pci_map(int enable)
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{
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enable_pci_map = enable;
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}
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phys_addr_t map_to_sysmem(const void *ptr)
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{
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return (u8 *)ptr - gd->arch.ram_buf;
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@ -4,6 +4,10 @@
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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pci0 = &pci;
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};
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chosen {
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stdout-path = "/serial";
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};
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@ -181,4 +185,20 @@
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};
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};
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pci: pci-controller {
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compatible = "sandbox,pci";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
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0x01000000 0 0x20000000 0x20000000 0 0x2000>;
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pci@1f,0 {
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compatible = "pci-generic";
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reg = <0xf800 0 0 0 0>;
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emul@1f,0 {
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compatible = "sandbox,swap-case";
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};
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};
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};
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};
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@ -22,10 +22,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags);
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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void unmap_physmem(const void *vaddr, unsigned long flags);
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/* For sandbox, we want addresses to point into our RAM buffer */
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static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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@ -33,8 +30,10 @@ static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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return map_physmem(paddr, len, MAP_WRBACK);
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}
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/* Remove a previous mapping */
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static inline void unmap_sysmem(const void *vaddr)
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{
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unmap_physmem(vaddr, MAP_WRBACK);
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}
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/* Map from a pointer to our RAM buffer */
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@ -48,6 +47,15 @@ phys_addr_t map_to_sysmem(const void *ptr);
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#define writew(v, addr)
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#define writel(v, addr)
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/* I/O access functions */
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int inl(unsigned int addr);
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int inw(unsigned int addr);
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int inb(unsigned int addr);
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void outl(unsigned int value, unsigned int addr);
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void outw(unsigned int value, unsigned int addr);
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void outb(unsigned int value, unsigned int addr);
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#include <iotrace.h>
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#endif
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12
arch/sandbox/include/asm/processor.h
Normal file
12
arch/sandbox/include/asm/processor.h
Normal file
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@ -0,0 +1,12 @@
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/*
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* Copyright (c) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_PROCESSOR_H
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#define _ASM_PROCESSOR_H
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/* This file is required for PCI */
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#endif
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@ -10,7 +10,12 @@
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#define __ASM_TEST_H
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/* The sandbox driver always permits an I2C device with this address */
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#define SANDBOX_I2C_TEST_ADDR 0x59
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#define SANDBOX_I2C_TEST_ADDR 0x59
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#define SANDBOX_PCI_VENDOR_ID 0x1234
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#define SANDBOX_PCI_DEVICE_ID 0x5678
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#define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
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#define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
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enum sandbox_i2c_eeprom_test_mode {
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SIE_TEST_MODE_NONE,
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@ -27,4 +27,52 @@ int cleanup_before_linux(void);
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/* drivers/video/sandbox_sdl.c */
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int sandbox_lcd_sdl_early_init(void);
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/**
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* pci_map_physmem() - map a PCI device into memory
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*
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* This is used on sandbox to map a device into memory so that it can be
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* used with normal memory access. After this call, some part of the device's
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* internal structure becomes visible.
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*
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* This function is normally called from sandbox's map_sysmem() automatically.
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*
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* @paddr: Physical memory address, normally corresponding to a PCI BAR
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* @lenp: On entry, the size of the area to map, On exit it is updated
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* to the size actually mapped, which may be less if the device
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* has less space
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* @devp: Returns the device which mapped into this space
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* @ptrp: Returns a pointer to the mapped address. The device's space
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* can be accessed as @lenp bytes starting here
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* @return 0 if OK, -ve on error
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*/
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int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,
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struct udevice **devp, void **ptrp);
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/**
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* pci_unmap_physmem() - undo a memory mapping
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*
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* This must be called after pci_map_physmem() to undo the mapping.
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*
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* @paddr: Physical memory address, as passed to pci_map_physmem()
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* @len: Size of area mapped, as returned by pci_map_physmem()
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* @dev: Device to unmap, as returned by pci_map_physmem()
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* @return 0 if OK, -ve on error
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*/
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int pci_unmap_physmem(const void *addr, unsigned long len,
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struct udevice *dev);
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/**
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* sandbox_set_enable_pci_map() - Enable / disable PCI address mapping
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*
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* Since address mapping involves calling every driver, provide a way to
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* enable and disable this. It can be handled automatically by the emulator
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* uclass, which knows if any emulators are currently active.
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*
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* If this is disabled, pci_map_physmem() will not be called from
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* map_sysmem().
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*
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* @enable: 0 to disable, 1 to enable
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*/
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void sandbox_set_enable_pci_map(int enable);
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#endif /* _U_BOOT_SANDBOX_H_ */
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@ -7,5 +7,5 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += interrupts.o
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obj-$(CONFIG_PCI) += pci_io.o
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138
arch/sandbox/lib/pci_io.c
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138
arch/sandbox/lib/pci_io.c
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/*
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* Copyright (c) 2014 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* IO space access commands.
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*/
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <asm/io.h>
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int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,
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struct udevice **devp, void **ptrp)
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{
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struct udevice *dev;
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int ret;
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*ptrp = 0;
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (!ops || !ops->map_physmem)
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continue;
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ret = (ops->map_physmem)(dev, paddr, lenp, ptrp);
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if (ret)
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continue;
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*devp = dev;
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return 0;
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}
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debug("%s: failed: addr=%x\n", __func__, paddr);
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return -ENOSYS;
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}
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int pci_unmap_physmem(const void *vaddr, unsigned long len,
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struct udevice *dev)
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{
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (!ops || !ops->unmap_physmem)
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return -ENOSYS;
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return (ops->unmap_physmem)(dev, vaddr, len);
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}
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static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size)
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{
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struct udevice *dev;
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int ret;
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*valuep = pci_get_ff(size);
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (ops && ops->read_io) {
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ret = (ops->read_io)(dev, addr, valuep, size);
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if (!ret)
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return 0;
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}
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}
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debug("%s: failed: addr=%x\n", __func__, addr);
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return -ENOSYS;
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}
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static int pci_io_write(unsigned int addr, ulong value, pci_size_t size)
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{
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struct udevice *dev;
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int ret;
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (ops && ops->write_io) {
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ret = (ops->write_io)(dev, addr, value, size);
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if (!ret)
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return 0;
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}
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}
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debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value);
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return -ENOSYS;
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}
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int inl(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_32);
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return ret ? 0 : value;
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}
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int inw(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_16);
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return ret ? 0 : value;
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}
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int inb(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_8);
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return ret ? 0 : value;
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}
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void outl(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_32);
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}
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void outw(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_16);
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}
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void outb(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_8);
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}
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