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u-boot/arch/arm/mach-rockchip/Makefile

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
# SPDX-License-Identifier: GPL-2.0+
rockchip: Add core SoC start-up code Add code for starting up U-Boot SPL and U-Boot proper. This is generic and makes use of devices provided by the board- or SoC-specific code. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:38 +00:00
#
# Copyright (c) 2014 Google, Inc
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
# We don't want the bootrom-helper present in a full U-Boot build, as
# this may have entered from ATF with the stack-pointer pointing to
# inaccessible/protected memory (and the bootrom-helper assumes that
# the stack-pointer is valid before switching to the U-Boot stack).
rockchip: back-to-bootrom: replace assembly-implementation with C-code The back-to-bootrom implementation for Rockchip has always relied on the stack-pointer being valid on entry, so there was little reason to have this as an assembly implementation. This provides a new C-only implementation of save_boot_params and back_to_bootrom (relying on setjmp/longjmp) and removes the older assembly-only implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-10-10 14:21:14 +00:00
obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
rk3288: vyasa: Add TPL support Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add new SPL features like Falcon mode or etc. So add TPL stage so-that adding new features to SPL is possible. - TPL: DRAM init, clocks - SPL: MMC, falcon, etc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-27 17:33:12 +00:00
obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
rockchip: rk3368: spl: add TPL support This adds the TPL support for the RK3368, including the u-boot-tpl.lds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:40:01 +00:00
obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
rockchip: rk322x: add tpl support Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-04-02 12:41:24 +00:00
obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
rockchip: rk3399: add tpl support Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-11-09 03:18:15 +00:00
obj-tpl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-tpl.o
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
rockchip: rk322x: add tpl support Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-04-02 12:41:24 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
rockchip: rk3288: dts: enable spl-boot-order We share the same default SPL boot order for all rk3288 boards, use dts instead of hard code in board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-09 13:58:54 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o spl-boot-order.o
rockchip: rk3328: add SPL board file support rk3328 SPL is locate at dram, so do not have strict size limit, suppose to enable storage media controller driver, load ATF and U-Boot, then boot into ATF. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from https://github.com/rockchip-linux/u-boot/commit/4ebe3968b683190cb8e5741aa7227b4fa7497874 with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-08 21:27:13 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o
rockchip: rk3368: spl: add SPL support Adds SPL support for the RK3368 (assuming that our TPL stage has initialised DRAM and set up the memory firewall). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-12 08:33:20 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
rockchip: spl: make spl-boot-order code reusable (split from rk3399) In order to reuse the support for the u-boot,spl-boot-order property from the rk3399, we split it into a reusable module that can be included by the SPL code for any of our boards. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-19 20:04:32 +00:00
obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
rockchip: Print a message when returning to the bootrom At present if the return to bootrom fails (e.g. because you are not using the Rockchip's bootrom's pointer table in MMC) then the board prints SPL message and hangs. Print a message first if we can, to help in understanding what happened when it hangs. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Heiko Stuebner <heiko@sntech.de>
2017-04-15 19:11:31 +00:00
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
rockchip: make boot_mode related codes reused across all platforms setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-11 07:00:16 +00:00
rockchip: fix turning off boot-mode via Kconfig The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will show as 0x0 if a default is provided and changed via Kconfig. However, it still will show as 0, if no default is given. Consequently, the "is set to something other than 0" test in a Makefile is cumbersome. Instead this check can easily be performed in the C-code. This removes the ifeq-check from mach-rockchip/Makefile, adds a matching #if-check to boot_mode.c and fixes resulting link issues (if boot_mode.o was not included due to the Makefile check) by defining a stub function (in case the functionality is not built in) for setup_boot_mode in boot_mode.c. Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-24 13:44:58 +00:00
# Always include boot_mode.o, as we bypass it (i.e. turn it off)
# inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0. This way,
# we can have the preprocessor correctly recognise both 0x0 and 0
# meaning "turn it off".
rockchip: make boot_mode related codes reused across all platforms setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-11 07:00:16 +00:00
obj-y += boot_mode.o
rockchip: rk3188: Add main, spl and tpl boards The rk3188 needs 3 U-Boot stages: a tpl living in 1KB of sram, a spl the resides in the rest of the sram and loads the regular U-Boot living in regular ram. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-02-18 18:46:38 +00:00
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
rockchip: rk3128: add soc basic support RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-28 08:04:16 +00:00
obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
rockchip: rk322x: add basic soc support Enable soc support for SPL and U-boot skeleton. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-23 09:17:52 +00:00
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
rockchip: rename board.c to rk3288-board.c Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-09-19 10:46:26 +00:00
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
rockchip: move common function from board-file to rk3036-board.c To keep it same with 3288 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-09-19 10:46:27 +00:00
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
rockchip: make boot_mode related codes reused across all platforms setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-11 07:00:16 +00:00
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o
ARM: rockchip: rv1108: Add a board_usb_init for USB OTG Like it is done for other Rockchip SoCs, introduce a board_usb_init() function so that USB OTG can be functional on rv1108 too. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-30 13:34:15 +00:00
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o
rockchip: Add core SoC start-up code Add code for starting up U-Boot SPL and U-Boot proper. This is generic and makes use of devices provided by the board- or SoC-specific code. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:38 +00:00
endif
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
rockchip: rk3128: add soc basic support RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host and device, HDMI/LVDS/MIPI display. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-28 08:04:16 +00:00
obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
rockchip: rk3188: rock: adjust for SPL/TPL split With the changes to split SPL/TPL for the RK3368, I apparently missed some needed adjustments to the RK3188 Kconfig and rock_defconfig. This fixes build-issues for the rock board after applying the RK3368 enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT, TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols now. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-03 20:52:04 +00:00
ifndef CONFIG_TPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
endif
rockchip: rk322x: add basic soc support Enable soc support for SPL and U-boot skeleton. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-23 09:17:52 +00:00
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
cosmetic: rockchip: sort socs according to numbers Having some sort of ordering proofed helpful in a lot of other places already. So for a larger number of rockchip socs it might be helpful as well instead of an ever increasing unsorted list. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-15 22:17:15 +00:00
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
rockchip: rk3328: add soc basic support RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-23 07:37:51 +00:00
obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 09:51:18 +00:00
obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 13:16:59 +00:00
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
rockchip: Add core Soc start-up code for rv1108 RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-01 10:00:55 +00:00
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
rockchip: Makefile: streamline SPL/TPL configuration Handling TPL and SPL in the Makefile for mach-rockchip was based on nested if checks and/or if-else-if paths. This can be simplified and made more readable by using $(SPL_TPL_) and by introducing intermediate variables for the aggregation of SPL and TPL features. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-04 12:38:28 +00:00
# Clear out SPL objects, in case this is a TPL build
obj-spl-$(CONFIG_TPL_BUILD) =
# Now add SPL/TPL objects back into the main build
obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
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