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u-boot/configs/imx8mp_evk_defconfig

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imx: add i.MX8MP EVK board Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-30 09:46:21 +00:00
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
imx: imx8mp_evk: fix boot issue The u-boot-spl.bin pad with ddr firmware conflicts with the CONFIG_MALLOC_F_ADDR area, the ddr firmware will be overwritten by malloc in SPL stage and cause ddr initialization not able to finish. So update the related addresses to fix the issue. Reported-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-26 23:33:50 +00:00
CONFIG_SYS_MALLOC_F_LEN=0x8000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
imx: add i.MX8MP EVK board Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-30 09:46:21 +00:00
CONFIG_DM_GPIO=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:54:25 +00:00
CONFIG_SPL_TEXT_BASE=0x920000
imx: add i.MX8MP EVK board Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-30 09:46:21 +00:00
CONFIG_TARGET_IMX8MP_EVK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-23 12:20:07 +00:00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
imx: add i.MX8MP EVK board Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-30 09:46:21 +00:00
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-04-29 13:04:26 +00:00
CONFIG_SPL_SYSRESET=y
imx: add i.MX8MP EVK board Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-30 09:46:21 +00:00
CONFIG_SYSRESET_PSCI=y
ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-04-29 13:04:26 +00:00
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_IMX_WATCHDOG=y
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