2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2007-03-11 12:42:58 +00:00
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/*
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2018-07-13 06:26:28 +00:00
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* (C) Copyright 2007-2018 Michal Simek
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2007-03-11 12:42:58 +00:00
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*
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2018-07-13 06:26:28 +00:00
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* Michal SIMEK <monstr@monstr.eu>
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2007-03-11 12:42:58 +00:00
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*/
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2018-07-14 21:04:35 +00:00
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/*
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* This is a board specific file. It's OK to include board specific
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* header files
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*/
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2007-03-11 12:42:58 +00:00
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#include <common.h>
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2007-03-30 20:52:09 +00:00
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#include <config.h>
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2020-05-10 17:40:03 +00:00
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#include <env.h>
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2019-11-14 19:57:46 +00:00
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#include <init.h>
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2022-03-01 08:13:20 +00:00
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#include <image.h>
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#include <lmb.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2018-07-13 06:26:28 +00:00
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#include <dm/lists.h>
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2014-05-08 14:08:44 +00:00
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#include <fdtdec.h>
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2019-09-25 09:00:17 +00:00
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#include <linux/sizes.h>
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2020-10-23 05:54:18 +00:00
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#include "../common/board.h"
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2013-04-24 08:01:20 +00:00
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2014-05-08 14:08:44 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2017-03-31 14:40:32 +00:00
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int dram_init_banksize(void)
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2014-05-08 14:08:44 +00:00
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{
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2018-11-22 11:39:18 +00:00
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return fdtdec_setup_memory_banksize();
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2014-05-08 14:08:44 +00:00
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}
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int dram_init(void)
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{
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2018-11-22 11:39:18 +00:00
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if (fdtdec_setup_mem_size_base() != 0)
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return -EINVAL;
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2014-05-08 14:08:44 +00:00
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return 0;
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};
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2022-03-01 08:13:20 +00:00
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ulong board_get_usable_ram_top(ulong total_size)
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{
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phys_size_t size;
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phys_addr_t reg;
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struct lmb lmb;
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/* found enough not-reserved memory to relocated U-Boot */
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lmb_init(&lmb);
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lmb_add(&lmb, gd->ram_base, gd->ram_size);
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boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
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size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE);
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reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
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if (!reg)
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reg = gd->ram_top - size;
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return reg + size;
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}
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2015-12-11 14:01:28 +00:00
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int board_late_init(void)
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2012-07-04 11:12:37 +00:00
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{
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2020-10-23 05:54:18 +00:00
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ulong max_size;
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2020-09-22 11:18:53 +00:00
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u32 status = 0;
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2019-09-25 09:00:17 +00:00
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2018-07-13 06:26:28 +00:00
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE)
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int ret;
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2018-07-14 20:35:40 +00:00
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2018-07-13 06:26:28 +00:00
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ret = device_bind_driver(gd->dm_root, "mb_soft_reset",
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"reset_soft", NULL);
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if (ret)
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printf("Warning: No reset driver: ret=%d\n", ret);
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#endif
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2019-09-25 09:00:17 +00:00
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if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
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debug("Saved variables - Skipping\n");
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return 0;
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}
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max_size = gd->start_addr_sp - CONFIG_STACK_SIZE;
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max_size = round_down(max_size, SZ_16M);
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2020-09-22 11:18:54 +00:00
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status |= env_set_hex("scriptaddr", max_size + SZ_2M);
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status |= env_set_hex("pxefile_addr_r", max_size + SZ_1M);
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status |= env_set_hex("kernel_addr_r", gd->ram_base + SZ_32M);
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status |= env_set_hex("fdt_addr_r", gd->ram_base + SZ_32M - SZ_1M);
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status |= env_set_hex("ramdisk_addr_r",
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gd->ram_base + SZ_32M + SZ_4M + SZ_2M);
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2020-12-17 10:15:55 +00:00
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if (IS_ENABLED(CONFIG_MTD_NOR_FLASH))
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status |= env_set_hex("script_offset_nor",
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gd->bd->bi_flashstart +
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CONFIG_BOOT_SCRIPT_OFFSET);
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2020-09-22 11:18:53 +00:00
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if (status)
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printf("%s: Saving run time variables FAILED\n", __func__);
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2019-09-25 09:00:17 +00:00
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2020-10-23 05:54:18 +00:00
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return board_late_init_xilinx();
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2012-07-04 11:12:37 +00:00
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}
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