2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2015-10-26 11:47:52 +00:00
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/*
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* Copyright (C) 2015 Freescale Semiconductor
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2021-06-03 02:51:19 +00:00
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* Copyright 2019-2021 NXP
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2015-10-26 11:47:52 +00:00
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*/
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#ifndef __LS1043A_COMMON_H
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#define __LS1043A_COMMON_H
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2017-03-30 04:22:38 +00:00
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/* SPL build */
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#ifdef CONFIG_SPL_BUILD
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#define SPL_NO_FMAN
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#define SPL_NO_DSPI
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#define SPL_NO_PCIE
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#define SPL_NO_ENV
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#define SPL_NO_MISC
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#define SPL_NO_USB
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#define SPL_NO_SATA
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#define SPL_NO_QE
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#define SPL_NO_EEPROM
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#endif
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#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
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#define SPL_NO_MMC
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#endif
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2017-09-15 01:51:58 +00:00
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#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
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2017-03-30 04:22:38 +00:00
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#define SPL_NO_IFC
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#endif
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2017-03-22 06:36:27 +00:00
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#include <asm/arch/stream_id_lsch2.h>
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2015-10-26 11:47:52 +00:00
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#include <asm/arch/config.h>
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/* Link Definitions */
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2018-11-05 18:02:44 +00:00
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#ifdef CONFIG_TFABOOT
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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#else
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2015-10-26 11:47:52 +00:00
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
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2018-11-05 18:02:44 +00:00
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#endif
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2015-10-26 11:47:52 +00:00
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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2015-11-23 07:23:48 +00:00
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#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
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2015-10-26 11:47:52 +00:00
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2020-06-01 19:53:26 +00:00
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#define CPU_RELEASE_ADDR secondary_boot_addr
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2015-10-26 11:47:57 +00:00
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2015-10-26 11:47:52 +00:00
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/* Serial Port */
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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2017-01-10 08:44:15 +00:00
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#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
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2015-10-26 11:47:52 +00:00
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2015-10-26 11:47:56 +00:00
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/* SD boot SPL */
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#ifdef CONFIG_SD_BOOT
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2017-04-17 12:37:17 +00:00
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#define CONFIG_SPL_MAX_SIZE 0x17000
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2015-10-26 11:47:56 +00:00
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#define CONFIG_SPL_STACK 0x1001e000
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#define CONFIG_SPL_PAD_TO 0x1d000
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2017-09-28 15:42:16 +00:00
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
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CONFIG_SPL_BSS_MAX_SIZE)
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2015-10-26 11:47:56 +00:00
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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2017-09-28 15:42:16 +00:00
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#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
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2015-10-26 11:47:56 +00:00
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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2017-04-17 12:37:17 +00:00
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2019-11-07 16:11:32 +00:00
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#ifdef CONFIG_NXP_ESBC
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2017-04-17 12:37:17 +00:00
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#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
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/*
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* HDR would be appended at end of image and copied to DDR along
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* with U-Boot image. Here u-boot max. size is 512K. So if binary
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* size increases then increase this size in case of secure boot as
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* it uses raw u-boot image instead of fit image.
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*/
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#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
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#else
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#define CONFIG_SYS_MONITOR_LEN 0x100000
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2019-11-07 16:11:32 +00:00
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#endif /* ifdef CONFIG_NXP_ESBC */
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2015-10-26 11:47:56 +00:00
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#endif
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2015-10-26 11:47:53 +00:00
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/* NAND SPL */
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#ifdef CONFIG_NAND_BOOT
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#define CONFIG_SPL_PBL_PAD
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#define CONFIG_SPL_MAX_SIZE 0x1a000
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#define CONFIG_SPL_STACK 0x1001d000
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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2017-04-17 12:37:18 +00:00
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2019-11-07 16:11:32 +00:00
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#ifdef CONFIG_NXP_ESBC
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2017-04-17 12:37:18 +00:00
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#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
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2019-11-07 16:11:32 +00:00
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#endif /* ifdef CONFIG_NXP_ESBC */
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2017-04-17 12:37:18 +00:00
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#ifdef CONFIG_U_BOOT_HDR_SIZE
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/*
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* HDR would be appended at end of image and copied to DDR along
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* with U-Boot image. Here u-boot max. size is 512K. So if binary
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* size increases then increase this size in case of secure boot as
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* it uses raw u-boot image instead of fit image.
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*/
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#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
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#else
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#define CONFIG_SYS_MONITOR_LEN 0x100000
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#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
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2015-10-26 11:47:53 +00:00
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#endif
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2021-02-05 11:01:56 +00:00
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/* GPIO */
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2015-10-26 11:47:52 +00:00
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/* IFC */
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2017-03-30 04:22:38 +00:00
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#ifndef SPL_NO_IFC
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2018-11-05 18:02:44 +00:00
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#if defined(CONFIG_TFABOOT) || \
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(!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
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2015-10-26 11:47:52 +00:00
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/*
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* CONFIG_SYS_FLASH_BASE has the final address (core view)
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* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
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* CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
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* CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
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*/
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#define CONFIG_SYS_FLASH_BASE 0x60000000
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#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
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2017-02-11 13:43:54 +00:00
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#ifdef CONFIG_MTD_NOR_FLASH
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2015-10-26 11:47:52 +00:00
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
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#endif
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2016-01-25 07:16:06 +00:00
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#endif
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2017-03-30 04:22:38 +00:00
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#endif
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2015-10-26 11:47:52 +00:00
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/* I2C */
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/* PCIe */
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2017-03-30 04:22:38 +00:00
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#ifndef SPL_NO_PCIE
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2015-10-26 11:47:52 +00:00
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#ifdef CONFIG_PCI
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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2017-03-30 04:22:38 +00:00
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#endif
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2015-10-26 11:47:52 +00:00
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2016-01-25 07:16:05 +00:00
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/* DSPI */
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2015-10-26 11:47:54 +00:00
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/* FMan ucode */
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2017-03-30 04:22:38 +00:00
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#ifndef SPL_NO_FMAN
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2015-10-26 11:47:54 +00:00
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#define CONFIG_SYS_DPAA_FMAN
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#ifdef CONFIG_SYS_DPAA_FMAN
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#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
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#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
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#endif
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2017-03-30 04:22:38 +00:00
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#endif
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2015-10-26 11:47:54 +00:00
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2015-10-26 11:47:52 +00:00
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/* Miscellaneous configurable options */
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#define CONFIG_HWCONFIG
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#define HWCONFIG_BUFFER_SIZE 128
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2017-03-30 04:22:38 +00:00
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#ifndef SPL_NO_MISC
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2017-06-08 07:59:48 +00:00
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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2019-01-29 15:38:40 +00:00
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func(USB, usb, 0) \
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func(DHCP, dhcp, na)
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2017-06-08 07:59:48 +00:00
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#include <config_distro_bootcmd.h>
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#endif
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2015-10-26 11:47:52 +00:00
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"hwconfig=fsl_ddr:bank_intlv=auto\0" \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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2017-11-22 05:08:35 +00:00
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"kernel_addr=0x61000000\0" \
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2017-06-08 07:59:48 +00:00
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"scriptaddr=0x80000000\0" \
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2017-06-05 18:21:51 +00:00
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"scripthdraddr=0x80080000\0" \
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2017-06-08 07:59:48 +00:00
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"fdtheader_addr_r=0x80100000\0" \
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"kernelheader_addr_r=0x80200000\0" \
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"kernel_addr_r=0x81000000\0" \
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2018-11-20 08:55:25 +00:00
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"kernel_start=0x1000000\0" \
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"kernelheader_start=0x800000\0" \
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2017-06-08 07:59:48 +00:00
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"fdt_addr_r=0x90000000\0" \
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"load_addr=0xa0000000\0" \
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2020-11-05 08:38:55 +00:00
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"kernelheader_addr=0x60600000\0" \
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2016-03-15 08:35:57 +00:00
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"kernel_size=0x2800000\0" \
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2017-11-22 05:08:35 +00:00
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"kernelheader_size=0x40000\0" \
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2017-11-09 09:57:55 +00:00
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"kernel_addr_sd=0x8000\0" \
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"kernel_size_sd=0x14000\0" \
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2020-11-05 08:38:55 +00:00
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"kernelhdr_addr_sd=0x3000\0" \
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2017-11-22 05:08:35 +00:00
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"kernelhdr_size_sd=0x10\0" \
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2017-06-08 07:59:48 +00:00
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"console=ttyS0,115200\0" \
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2017-09-28 15:42:16 +00:00
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"boot_os=y\0" \
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2017-10-22 21:55:07 +00:00
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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2017-06-08 07:59:48 +00:00
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BOOTENV \
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"boot_scripts=ls1043ardb_boot.scr\0" \
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2017-06-05 18:21:51 +00:00
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"boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
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2017-06-08 07:59:48 +00:00
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"scan_dev_for_boot_part=" \
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"part list ${devtype} ${devnum} devplist; " \
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"env exists devplist || setenv devplist 1; " \
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"for distro_bootpart in ${devplist}; do " \
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"if fstype ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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"bootfstype; then " \
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"run scan_dev_for_boot; " \
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"fi; " \
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"done\0" \
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2017-06-05 18:21:51 +00:00
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"boot_a_script=" \
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"load ${devtype} ${devnum}:${distro_bootpart} " \
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"${scriptaddr} ${prefix}${script}; " \
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"env exists secureboot && load ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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2019-04-23 05:52:17 +00:00
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"${scripthdraddr} ${prefix}${boot_script_hdr}; " \
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"env exists secureboot " \
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2017-06-05 18:21:51 +00:00
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"&& esbc_validate ${scripthdraddr};" \
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"source ${scriptaddr}\0" \
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2017-06-08 07:59:48 +00:00
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"qspi_bootcmd=echo Trying load from qspi..;" \
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"sf probe && sf read $load_addr " \
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2019-11-14 07:08:15 +00:00
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"$kernel_start $kernel_size; env exists secureboot " \
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"&& sf read $kernelheader_addr_r $kernelheader_start " \
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2017-11-22 05:08:35 +00:00
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"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
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"bootm $load_addr#$board\0" \
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2017-06-08 07:59:48 +00:00
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"nor_bootcmd=echo Trying load from nor..;" \
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"cp.b $kernel_addr $load_addr " \
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2017-11-22 05:08:35 +00:00
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"$kernel_size; env exists secureboot " \
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"&& cp.b $kernelheader_addr $kernelheader_addr_r " \
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"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
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"bootm $load_addr#$board\0" \
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2018-11-20 08:55:25 +00:00
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"nand_bootcmd=echo Trying load from NAND..;" \
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"nand info; nand read $load_addr " \
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"$kernel_start $kernel_size; env exists secureboot " \
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"&& nand read $kernelheader_addr_r $kernelheader_start " \
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"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
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"bootm $load_addr#$board\0" \
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2017-11-09 09:57:55 +00:00
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"sd_bootcmd=echo Trying load from SD ..;" \
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"mmcinfo; mmc read $load_addr " \
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"$kernel_addr_sd $kernel_size_sd && " \
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2017-11-22 05:08:35 +00:00
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"env exists secureboot && mmc read $kernelheader_addr_r " \
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"$kernelhdr_addr_sd $kernelhdr_size_sd " \
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" && esbc_validate ${kernelheader_addr_r};" \
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2017-11-09 09:57:55 +00:00
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"bootm $load_addr#$board\0"
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2017-06-08 07:59:48 +00:00
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2018-11-05 18:02:44 +00:00
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#ifdef CONFIG_TFABOOT
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#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
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"env exists secureboot && esbc_halt;"
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#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
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"env exists secureboot && esbc_halt;"
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#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
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"env exists secureboot && esbc_halt;"
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2018-12-27 04:37:53 +00:00
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#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
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"env exists secureboot && esbc_halt;"
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2017-03-30 04:22:38 +00:00
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#endif
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2018-11-05 18:02:44 +00:00
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#endif
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2015-10-26 11:47:52 +00:00
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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2017-03-30 04:22:38 +00:00
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2015-10-26 11:47:52 +00:00
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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2017-05-17 14:23:10 +00:00
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#include <asm/arch/soc.h>
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2015-10-26 11:47:52 +00:00
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#endif /* __LS1043A_COMMON_H */
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