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u-boot/include/configs/imx6_spl.h

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mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
/*
* Copyright (C) 2014 Gateworks Corporation
* Author: Tim Harvey <tharvey@gateworks.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __IMX6_SPL_CONFIG_H
#define __IMX6_SPL_CONFIG_H
#ifdef CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
/*
* see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals:
* - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
* - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well
* - BOOT ROM stack is at 0x0091FFB8
* - if icache/dcache is enabled (eFuse/strapping controlled) then the
* IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
* fit between 0x00907000 and 0x00918000.
* - Additionally the BOOT ROM loads what they consider the firmware image
* which consists of a 4K header in front of us that contains the IVT, DCD
* and some padding thus 'our' max size is really 0x00908000 - 0x00918000
* or 64KB
*/
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms This moves what was in arch/arm/cpu/armv7/omap-common in to arch/arm/mach-omap2 and moves arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2 as subdirectories. All refernces to the former locations are updated to the current locations. For the logic to decide what our outputs are, consolidate the tests into a single config.mk rather than including 4. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-08 02:34:54 +00:00
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#define CONFIG_SPL_TEXT_BASE 0x00908000
ARM: mx6: Add support for Kosagi Novena Add support for the Kosagi Novena board. Currently supported are: - I2C busses - FEC Ethernet - MMC0, MMC1, Booting from MMC - SATA - USB ports - USB Ethernet Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Sean Cross <xobs@kosagi.com> Cc: Nikolay Dimitrov <picmaster@mail.bg> Reviewed-by: Nikolay Dimitrov <picmaster@mail.bg>
2014-10-24 21:39:07 +00:00
#define CONFIG_SPL_MAX_SIZE 0x10000
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#define CONFIG_SPL_STACK 0x0091FFB8
arm: mx6: specify SPL padding Specify standard padding for payload to 68KB. This is derived from the maximum header size plus maximum SPL size. It matches the already defined offset for SD/eMMC devices (69KB) too. This allows to use the u-boot-with-spl.imx build target to generate a directly flashable image which can be flashed using: dd if=u-boot-with-spl.imx of=/dev/mmcblk0 bs=512 skip=2 While the patch has been created with SD/eMMC in mind, this also works with other boot media. The board file needs to configure the media specific (absolute) payload offset accordingly. Especially the IVT offset is boot media specific and can be retrieved from the reference manual (Table 8-25. Image Vector Table Offset and Initial Load Region Size). For NAND boot a define like this should do the job: #define CONFIG_SYS_NAND_U_BOOT_OFFS (SPL_PAD_TO + 0x400) Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-11-15 18:38:23 +00:00
/*
* Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
* SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
* boot media (given that boot media specific offset is configured properly).
*/
#define CONFIG_SPL_PAD_TO 0x11000
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
/* NAND support */
#if defined(CONFIG_SPL_NAND_SUPPORT)
#define CONFIG_SPL_NAND_MXS
#endif
/* MMC support */
#if defined(CONFIG_SPL_MMC_SUPPORT)
MMC SD fs boot partition config coding style and proper description CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION ought to be called CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to keep it consistent with other config options such as: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR. In addition, it is not related to raw mode booting but to fs mode instead. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
2014-11-08 22:14:55 +00:00
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS This option isn't used for anything, so get rid of it. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-11-16 17:19:06 +00:00
#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#endif
/* SATA support */
#if defined(CONFIG_SPL_SATA_SUPPORT)
#define CONFIG_SPL_SATA_BOOT_DEVICE 0
#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
#endif
/* Define the payload for FAT/EXT support */
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
Rename some defines containing FAT in their name to be filesystem generic Rename some defines containing FAT in their name to be filesystem generic: MMCSD_MODE_FAT => MMCSD_MODE_FS CONFIG_SPL_FAT_LOAD_ARGS_NAME => CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME => CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION => CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
2014-10-15 15:53:11 +00:00
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#endif
imx: mx6slevk: add SPL support Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2015-08-17 08:11:05 +00:00
#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
imx:mx6 add mx6sx in imx spl header file Since mx6sx's memory space is different to mx6dq, redefine the SPL related macro for mx6sx chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-30 09:24:02 +00:00
#define CONFIG_SPL_BSS_START_ADDR 0x88200000
arm: mx6: Reduce SPL malloc pool size Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2015-11-20 20:43:24 +00:00
#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
imx:mx6 add mx6sx in imx spl header file Since mx6sx's memory space is different to mx6dq, redefine the SPL related macro for mx6sx chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-30 09:24:02 +00:00
#define CONFIG_SYS_SPL_MALLOC_START 0x88300000
arm: mx6: Reduce SPL malloc pool size Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2015-11-20 20:43:24 +00:00
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
imx:mx6 add mx6sx in imx spl header file Since mx6sx's memory space is different to mx6dq, redefine the SPL related macro for mx6sx chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-30 09:24:02 +00:00
#define CONFIG_SYS_TEXT_BASE 0x87800000
#else
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#define CONFIG_SPL_BSS_START_ADDR 0x18200000
#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
#define CONFIG_SYS_SPL_MALLOC_START 0x18300000
arm: mx6: Reduce SPL malloc pool size Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2015-11-20 20:43:24 +00:00
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#define CONFIG_SYS_TEXT_BASE 0x17800000
#endif
imx:mx6 add mx6sx in imx spl header file Since mx6sx's memory space is different to mx6dq, redefine the SPL related macro for mx6sx chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-30 09:24:02 +00:00
#endif
mx6: add common SPL configuration Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-02 23:13:19 +00:00
#endif
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