2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
2014-06-18 12:23:58 +00:00
|
|
|
/*
|
|
|
|
* Copyright (C) 2013 Samsung Electronics
|
|
|
|
*
|
|
|
|
* Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __CONFIG_PEACH_PIT_H
|
|
|
|
#define __CONFIG_PEACH_PIT_H
|
|
|
|
|
2015-03-12 21:33:29 +00:00
|
|
|
#define MEM_LAYOUT_ENV_SETTINGS \
|
|
|
|
"bootm_size=0x10000000\0" \
|
|
|
|
"kernel_addr_r=0x22000000\0" \
|
|
|
|
"fdt_addr_r=0x23000000\0" \
|
|
|
|
"ramdisk_addr_r=0x23300000\0" \
|
|
|
|
"scriptaddr=0x30000000\0" \
|
|
|
|
"pxefile_addr_r=0x31000000\0"
|
|
|
|
|
2014-10-08 04:01:46 +00:00
|
|
|
#include <configs/exynos5420-common.h>
|
2014-10-08 04:01:47 +00:00
|
|
|
#include <configs/exynos5-dt-common.h>
|
2015-08-03 14:19:29 +00:00
|
|
|
#include <configs/exynos5-common.h>
|
2014-06-18 12:23:58 +00:00
|
|
|
|
2022-11-16 18:10:37 +00:00
|
|
|
#define CFG_SYS_SDRAM_BASE 0x20000000
|
2014-12-12 05:45:44 +00:00
|
|
|
|
2014-11-13 17:08:19 +00:00
|
|
|
/* DRAM Memory Banks */
|
|
|
|
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
|
|
|
|
|
2014-06-18 12:23:58 +00:00
|
|
|
#endif /* __CONFIG_PEACH_PIT_H */
|