u-boot/arch/riscv/include/asm/system.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2017 Andes Technology Corporation
 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
 */

#ifndef __ASM_RISCV_SYSTEM_H
#define __ASM_RISCV_SYSTEM_H

#include <asm/csr.h>

struct event;

/*
 * Interupt configuration macros
 */

#define local_irq_save(__flags)                                 \
    do {                                                        \
        __flags = csr_read_clear(CSR_SSTATUS, SR_SIE) & SR_SIE; \
    } while (0)

#define local_irq_restore(__flags)              \
    do {                                        \
        csr_set(CSR_SSTATUS, __flags & SR_SIE); \
    } while (0)

/* Hook to set up the CPU (called from SPL too) */
int riscv_cpu_setup(void);

#endif	/* __ASM_RISCV_SYSTEM_H */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
riscv: nx25: include: Add header files to support RISC-V Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> 2017-12-26 05:55:51 +00:00			`/*`
			`* Copyright (C) 2017 Andes Technology Corporation`
			`* Rick Chen, Andes Technology Corporation <rick@andestech.com>`
			`*/`

			`#ifndef __ASM_RISCV_SYSTEM_H`
			`#define __ASM_RISCV_SYSTEM_H`

riscv: implement local_irq_{save,restore} macros Add implementations of the local_irq_{save,restore} macros so that <asm/atomic.h> can be used with riscv. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 2023-05-05 08:02:06 +00:00			`#include <asm/csr.h>`

event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org> 2022-03-04 15:43:05 +00:00			`struct event;`

riscv: nx25: include: Add header files to support RISC-V Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> 2017-12-26 05:55:51 +00:00			`/*`
riscv: implement local_irq_{save,restore} macros Add implementations of the local_irq_{save,restore} macros so that <asm/atomic.h> can be used with riscv. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 2023-05-05 08:02:06 +00:00			`* Interupt configuration macros`
riscv: nx25: include: Add header files to support RISC-V Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> 2017-12-26 05:55:51 +00:00			`*/`

riscv: implement local_irq_{save,restore} macros Add implementations of the local_irq_{save,restore} macros so that <asm/atomic.h> can be used with riscv. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 2023-05-05 08:02:06 +00:00			`#define local_irq_save(__flags) \`
			`do { \`
			`__flags = csr_read_clear(CSR_SSTATUS, SR_SIE) & SR_SIE; \`
			`} while (0)`

			`#define local_irq_restore(__flags) \`
			`do { \`
			`csr_set(CSR_SSTATUS, __flags & SR_SIE); \`
			`} while (0)`

event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org> 2022-03-04 15:43:05 +00:00			`/* Hook to set up the CPU (called from SPL too) */`
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org> 2023-08-22 03:16:56 +00:00			`int riscv_cpu_setup(void);`
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org> 2022-03-04 15:43:05 +00:00
riscv: nx25: include: Add header files to support RISC-V Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> 2017-12-26 05:55:51 +00:00			`#endif /* __ASM_RISCV_SYSTEM_H */`