2019-02-25 15:33:00 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* board.c
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*
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* Board functions for Bosch Guardian
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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* Copyright (C) 2018 Robert Bosch Power Tools GmbH
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*/
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#include <common.h>
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#include <dm.h>
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2019-08-02 15:44:25 +00:00
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#include <env_internal.h>
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2019-02-25 15:33:00 +00:00
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#include <errno.h>
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#include <i2c.h>
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2020-03-25 06:45:45 +00:00
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#include <led.h>
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2019-02-25 15:33:00 +00:00
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#include <panel.h>
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2021-06-11 16:13:43 +00:00
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#include <linux/delay.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2019-02-25 15:33:00 +00:00
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#include <power/tps65217.h>
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#include <spl.h>
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#include <watchdog.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/hardware.h>
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2021-06-11 16:13:34 +00:00
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#include <asm/arch/mem-guardian.h>
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2019-02-25 15:33:00 +00:00
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#include <asm/arch/omap.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/emif.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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2021-06-11 16:13:47 +00:00
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#include <jffs2/load_kernel.h>
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#include <mtd.h>
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#include <nand.h>
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#include <video.h>
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#include <video_console.h>
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2019-02-25 15:33:00 +00:00
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#include "board.h"
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DECLARE_GLOBAL_DATA_PTR;
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2021-08-28 01:18:30 +00:00
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#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
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2019-02-25 15:33:00 +00:00
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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static const struct ddr_data ddr3_data = {
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.datardsratio0 = MT41K128M16JT125K_RD_DQS,
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.datawdsratio0 = MT41K128M16JT125K_WR_DQS,
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.datafwsratio0 = MT41K128M16JT125K_PHY_FIFO_WE,
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.datawrsratio0 = MT41K128M16JT125K_PHY_WR_DATA,
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};
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static const struct cmd_control ddr3_cmd_ctrl_data = {
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.cmd0csratio = MT41K128M16JT125K_RATIO,
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.cmd0iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
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.cmd1csratio = MT41K128M16JT125K_RATIO,
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.cmd1iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
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.cmd2csratio = MT41K128M16JT125K_RATIO,
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.cmd2iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
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};
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static struct emif_regs ddr3_emif_reg_data = {
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.sdram_config = MT41K128M16JT125K_EMIF_SDCFG,
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.ref_ctrl = MT41K128M16JT125K_EMIF_SDREF,
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.sdram_tim1 = MT41K128M16JT125K_EMIF_TIM1,
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.sdram_tim2 = MT41K128M16JT125K_EMIF_TIM2,
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.sdram_tim3 = MT41K128M16JT125K_EMIF_TIM3,
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.zq_config = MT41K128M16JT125K_ZQ_CFG,
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.emif_ddr_phy_ctlr_1 = MT41K128M16JT125K_EMIF_READ_LATENCY,
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};
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#define OSC (V_OSCK / 1000000)
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const struct dpll_params dpll_ddr = {
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400, OSC - 1, 1, -1, -1, -1, -1};
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void am33xx_spl_board_init(void)
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{
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int mpu_vdd;
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int usb_cur_lim;
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/* Get the frequency */
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dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
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2022-05-04 11:02:58 +00:00
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/* Initialize for Power Management */
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if (power_tps65217_init(0))
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2019-02-25 15:33:00 +00:00
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return;
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/*
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* Increase USB current limit to 1300mA or 1800mA and set
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* the MPU voltage controller as needed.
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*/
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if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
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usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
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} else {
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usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
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}
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
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TPS65217_POWER_PATH,
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usb_cur_lim,
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TPS65217_USB_INPUT_CUR_LIMIT_MASK))
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puts("tps65217_reg_write failure\n");
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/* Set DCDC3 (CORE) voltage to 1.125V */
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if (tps65217_voltage_update(TPS65217_DEFDCDC3,
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TPS65217_DCDC_VOLT_SEL_1125MV)) {
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puts("tps65217_voltage_update failure\n");
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return;
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}
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/* Set CORE Frequencies to OPP100 */
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do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
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/* Set DCDC2 (MPU) voltage */
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if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
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puts("tps65217_voltage_update failure\n");
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return;
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}
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/*
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* Set LDO3 to 1.8V and LDO4 to 3.3V
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*/
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
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TPS65217_DEFLS1,
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TPS65217_LDO_VOLTAGE_OUT_1_8,
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TPS65217_LDO_MASK))
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puts("tps65217_reg_write failure\n");
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
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TPS65217_DEFLS2,
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TPS65217_LDO_VOLTAGE_OUT_3_3,
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TPS65217_LDO_MASK))
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puts("tps65217_reg_write failure\n");
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/* Set MPU Frequency to what we detected now that voltages are set */
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do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
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}
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const struct dpll_params *get_dpll_ddr_params(void)
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{
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enable_i2c0_pin_mux();
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return &dpll_ddr;
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}
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void set_uart_mux_conf(void)
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{
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enable_uart0_pin_mux();
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}
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void set_mux_conf_regs(void)
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{
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enable_board_pin_mux();
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}
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const struct ctrl_ioregs ioregs = {
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.cm0ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
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.cm1ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
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.cm2ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
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.dt0ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
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.dt1ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
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};
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void sdram_init(void)
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{
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config_ddr(400, &ioregs,
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&ddr3_data,
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&ddr3_cmd_ctrl_data,
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&ddr3_emif_reg_data, 0);
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}
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#endif
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int board_init(void)
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{
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2019-09-17 14:25:37 +00:00
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save_omap_boot_params();
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2019-02-25 15:33:00 +00:00
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#if defined(CONFIG_HW_WATCHDOG)
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hw_watchdog_init();
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#endif
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2022-11-16 18:10:37 +00:00
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gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
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2019-02-25 15:33:00 +00:00
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2019-10-03 17:50:03 +00:00
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#ifdef CONFIG_MTD_RAW_NAND
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2019-02-25 15:33:00 +00:00
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gpmc_init();
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#endif
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return 0;
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}
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2019-09-17 14:25:37 +00:00
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#ifdef CONFIG_BOARD_LATE_INIT
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static void set_bootmode_env(void)
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{
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char *boot_mode_gpio = "gpio@44e07000_14";
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int ret;
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struct gpio_desc boot_mode_desc;
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ret = dm_gpio_lookup_name(boot_mode_gpio, &boot_mode_desc);
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if (ret) {
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printf("%s is not found\n", boot_mode_gpio);
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goto err;
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}
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ret = dm_gpio_request(&boot_mode_desc, "setup_bootmode_env");
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if (ret && ret != -EBUSY) {
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printf("requesting gpio: %s failed\n", boot_mode_gpio);
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goto err;
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}
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2021-06-11 16:13:43 +00:00
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dm_gpio_set_dir_flags(&boot_mode_desc, GPIOD_IS_IN);
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udelay(10);
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ret = dm_gpio_get_value(&boot_mode_desc);
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if (ret == 0) {
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env_set("swi_status", "1");
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} else if (ret == 1) {
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env_set("swi_status", "0");
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} else {
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printf("swi status gpio error\n");
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goto err;
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}
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2019-09-17 14:25:37 +00:00
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return;
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err:
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env_set("swi_status", "err");
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}
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2021-06-11 16:13:44 +00:00
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void lcdbacklight_en(void)
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{
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unsigned long brightness = env_get_ulong("backlight_brightness", 10, 50);
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if (brightness > 99 || brightness == 0)
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brightness = 99;
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/*
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* Brightness range:
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* WLEDCTRL2 DUTY[6:0]
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*
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* 000 0000b = 1%
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* 000 0001b = 2%
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* ...
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* 110 0010b = 99%
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* 110 0011b = 100%
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*
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*/
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL2,
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brightness, 0xFF);
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL1,
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brightness != 0 ? 0x0A : 0x02, 0xFF);
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}
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2019-09-17 14:25:37 +00:00
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int board_late_init(void)
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{
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2021-06-11 16:13:47 +00:00
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int ret;
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struct udevice *cdev;
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2019-09-17 14:25:37 +00:00
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set_bootmode_env();
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2021-06-11 16:13:47 +00:00
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ret = uclass_get_device(UCLASS_PANEL, 0, &cdev);
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if (ret) {
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debug("video panel not found: %d\n", ret);
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return ret;
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}
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2022-05-04 11:02:58 +00:00
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/* Initialize to enable backlight */
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if (power_tps65217_init(0))
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return 0;
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2021-06-11 16:13:44 +00:00
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lcdbacklight_en();
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2021-06-11 16:13:47 +00:00
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2019-09-17 14:25:37 +00:00
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return 0;
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}
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#endif /* CONFIG_BOARD_LATE_INIT */
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