2012-12-11 13:34:18 +00:00
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/*
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* (C) Copyright 2010-2012
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* NVIDIA Corporation <www.nvidia.com>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2012-12-11 13:34:18 +00:00
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*/
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2013-02-26 12:18:48 +00:00
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#ifndef _TEGRA_COMMON_H_
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#define _TEGRA_COMMON_H_
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2014-02-26 13:47:58 +00:00
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#include <linux/sizes.h>
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2012-12-11 13:34:18 +00:00
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#include <linux/stringify.h>
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
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#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
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#include <asm/arch/tegra.h> /* get chip and board defs */
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2013-10-04 15:22:47 +00:00
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#define CONFIG_SYS_TIMER_RATE 1000000
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#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
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2012-12-11 13:34:18 +00:00
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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/* Environment */
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
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/*
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* Size of malloc() pool
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*/
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2015-03-04 13:01:30 +00:00
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#ifdef CONFIG_DFU_MMC
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#define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \
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CONFIG_SYS_DFU_DATA_BUF_SIZE)
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#else
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2012-12-11 13:34:18 +00:00
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#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
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2015-03-04 13:01:30 +00:00
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#endif
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2014-12-10 05:25:23 +00:00
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
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2012-12-11 13:34:18 +00:00
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/*
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2013-02-26 12:18:48 +00:00
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* NS16550 Configuration
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2012-12-11 13:34:18 +00:00
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*/
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2014-09-04 22:27:36 +00:00
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#define CONFIG_TEGRA_SERIAL
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#define CONFIG_SYS_NS16550
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2012-12-11 13:34:18 +00:00
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2014-04-18 16:56:11 +00:00
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/*
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* Common HW configuration.
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* If this varies between SoCs later, move to tegraNN-common.h
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* Note: This is number of devices, not max device ID.
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*/
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#define CONFIG_SYS_MMC_MAX_DEVICE 4
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2012-12-11 13:34:18 +00:00
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/*
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* select serial console configuration
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*/
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#define CONFIG_CONS_INDEX 1
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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/* include default commands */
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#include <config_cmd_default.h>
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/* remove unused commands */
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
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#undef CONFIG_CMD_FPGA /* FPGA configuration support */
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_NFS /* NFS support */
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/* turn on command-line edit/hist/auto */
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#define CONFIG_COMMAND_HISTORY
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2013-02-28 15:03:48 +00:00
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/* turn on commonly used storage-related commands */
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#define CONFIG_PARTITION_UUIDS
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#define CONFIG_CMD_PART
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2012-12-11 13:34:18 +00:00
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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2015-04-14 14:41:14 +00:00
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_SYS_STDIO_DEREGISTER
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#endif
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2012-12-11 13:34:18 +00:00
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_PROMPT V_PROMPT
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/*
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* Increasing the size of the IO buffer as default nfsargs size is more
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* than 256 and so it is not possible to edit it
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*/
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#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
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2014-11-11 00:16:42 +00:00
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#ifndef CONFIG_SPL_BUILD
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2014-08-26 09:49:46 +00:00
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#define CONFIG_USE_ARCH_MEMCPY
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2014-11-11 00:16:42 +00:00
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#endif
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2014-08-26 09:49:46 +00:00
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2012-12-11 13:34:18 +00:00
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
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#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_TEGRA_GPIO
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_ENTERRCM
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/* Defines for SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_NAND_SIMPLE
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2013-04-12 05:14:30 +00:00
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#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
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2012-12-11 13:34:18 +00:00
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CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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2013-03-05 14:39:56 +00:00
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#define CONFIG_SYS_GENERIC_BOARD
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2015-01-19 23:25:51 +00:00
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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2013-03-26 17:39:33 +00:00
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2013-02-28 15:03:45 +00:00
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/* Misc utility code */
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#define CONFIG_BOUNCE_BUFFER
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2013-03-26 17:39:33 +00:00
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#define CONFIG_CRC32_VERIFY
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2013-03-05 14:39:56 +00:00
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2014-02-05 16:24:57 +00:00
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#ifndef CONFIG_SPL_BUILD
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#include <config_distro_defaults.h>
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#endif
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2012-12-11 13:34:18 +00:00
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#endif /* _TEGRA_COMMON_H_ */
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