u-boot/arch/arm/dts/r8a77990-ebisu.dts

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Device Tree Source for the ebisu board
 *
 * Copyright (C) 2018 Renesas Electronics Corp.
 */

/dts-v1/;
#include "r8a77990.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Renesas Ebisu board based on r8a77990";
	compatible = "renesas,ebisu", "renesas,r8a77990";

	aliases {
		serial0 = &scif2;
		ethernet0 = &avb;
	};

	chosen {
		bootargs = "ignore_loglevel";
		stdout-path = "serial0:115200n8";
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x38000000>;
	};
};

&avb {
	pinctrl-0 = <&avb_pins>;
	pinctrl-names = "default";
	renesas,no-ether-link;
	phy-handle = <&phy0>;
	phy-mode = "rgmii-txid";
	status = "okay";

	phy0: ethernet-phy@0 {
		rxc-skew-ps = <1500>;
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
	};
};

&extal_clk {
	clock-frequency = <48000000>;
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	avb_pins: avb {
		mux {
			groups = "avb_link", "avb_mii";
			function = "avb";
		};
	};

	scif2_pins: scif2 {
		groups = "scif2_data_a";
		function = "scif2";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk_a";
		function = "scif_clk";
	};
};

&sdhi0 {
	status = "okay";
};

&sdhi1 {
	status = "okay";
};

&sdhi3 {
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};