Asahi Lina
bdd9603fa7
m1n1.agx: Add AGX.p = proxy
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:50:06 +09:00
Asahi Lina
ff9a88fbba
m1n1.trace.agx: Load initdata with the fully extended address
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
a69744688b
m1n1.trace.agx: Add regionA tracing, fix lengths
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
4c7bc1103c
m1n1.trace.agx: Redump more stuff after command completions
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
2fb80a5ae3
m1n1.trace.agx: Support optional monitoring of global regions
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And make it work across reloads
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
62c1f5bbc7
m1n1.trace.agx: Reload some stuff
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
a8038cb498
m1n1.trace.agx: Support GPUVM userspace tracing
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Still not perfect, cannot track all unmaps/maps properly, causes HV
translation faults...
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
ca653557a3
m1n1.fw.agx.initdata: Make printing work without the hypervisor
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:49:42 +09:00
Asahi Lina
29f300548b
m1n1.fw.agx.initdata & co: Add/fix lots of initdata stuff
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:46:01 +09:00
Asahi Lina
722f4c4b8e
m1n1.agx: Add channel allocation/init
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:46:01 +09:00
Asahi Lina
1f5905fffb
m1n1.agx.channels: Add channel management module
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:46:01 +09:00
Asahi Lina
cb5e8dbf3f
trace/agx.py: Update to new channel stuff names
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:46:01 +09:00
Asahi Lina
033bf7a130
m1n1.fw.agx.channels: Fix a bunch of structs, s/Channels/ChannelInfoSet/
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
ebe18e1fac
m1n1.agx: Add .work() and .log()
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
3bcc2243b5
m1n1.agx: Fix allocator mapping flags
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
bf73b7f671
m1n1.agx.object: GPUAllocator: Support configurable page sizes & context
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
c78e92e9ad
m1n1.agx: Add global object tracker
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
b7da00f761
m1n1.agx.object: Improve GPUObject
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
d531af3a6d
m1n1.fw.agx: Add address decoding & iotranslate
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
8a5ab0047a
m1n1.fw.agx: Rename endpoints & fix/add proper messages
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:40:46 +09:00
Asahi Lina
0fcaf69728
m1n1.hw.uat: Add RegMap accessor
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:28:54 +09:00
Asahi Lina
d7a4f30043
m1n1.agx: Use new UAT init API
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:28:54 +09:00
Asahi Lina
8d808904a0
m1n1.hw.uat: Handle multiple contexts
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:21:18 +09:00
Asahi Lina
3a773c8a6e
m1n1.fw.agx and friends: Add __all__ to lots of modules
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This unborks reloading, since otherwise non-reloaded modules can clobber
symbols from reloaded modules with their old versions
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:17:33 +09:00
Asahi Lina
6175739132
m1n1.hw.asc: Add work_for(time)
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:12:31 +09:00
Asahi Lina
1dad2dad6a
m1n1.fw.asc.crash: Decode registers and stacktraces
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:12:23 +09:00
Asahi Lina
eb15ba0102
m1n1.adt: Decode more GPU properties
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:11:23 +09:00
Asahi Lina
4dcdb608a7
m1n1.trace: Fix PrintTracer address decoding
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:10:57 +09:00
Asahi Lina
682333e520
m1n1.proxyutils: Add 512-bit read/write accessors
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:04:51 +09:00
Asahi Lina
f13489f516
m1n1.hv: Fix atomic instruction mask
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:04:31 +09:00
Asahi Lina
0a25a3ef0d
m1n1.hv: Fix trace_range()
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:04:09 +09:00
Asahi Lina
e1e8d05ead
m1n1.constructutils: Fix building ConstructValueClass
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:21 +09:00
Asahi Lina
a9ae6b81fa
m1n1.constructutils: Add a regmap() to make a RegMap out of a Construct
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Handy for ringbuf pointer type structures where we need to be able to
read/write individual members using atomic primitives, without going
through Construct.
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:21 +09:00
Asahi Lina
892ee0e76b
m1n1.utils: Split RegMap into BaseRegMap (without metaclass)
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This allows alternative BaseRegMap subclasses to dynamically build the
map instead of doing the metaclass stuff.
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:19 +09:00
Asahi Lina
28fdcb4284
m1n1.constructutils: Improve str representation, add dump() for Python
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:19 +09:00
Asahi Lina
4ad733493b
m1n1.constructutils: Add a global struct address tracer
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Currently unconditional, kind of hacky. Good for HV use.
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:19 +09:00
Asahi Lina
de4f024ced
m1n1.constructutils: Make the Pointer<->addr association two-way
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Also add Lazy support
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 23:03:17 +09:00
Asahi Lina
570ea8c4b8
m1n1.constructutils: Add .sizeof()
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:57:32 +09:00
Asahi Lina
83dfa1ef70
m1n1.constructutils: Move _off to class, improve addr stuff
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:56:52 +09:00
Asahi Lina
029ba73f44
m1n1.constructutils: Make Dec buildable
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:54:21 +09:00
Asahi Lina
1c35ce60c7
m1n1.constructutils: Better string representations
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:53:57 +09:00
Asahi Lina
3fe8f3e72f
m1n1.constructutils: Improve recursive reload
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Reload more things, but also avoid reloading the same class multiple
times.
Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:53:17 +09:00
Asahi Lina
b48e33a333
hv: More instructions
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2022-06-02 22:50:52 +09:00
Hector Martin
17abe8f94b
display: Report time spent modesetting
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 02:03:32 +09:00
Hector Martin
714420a694
display: Put DCP to sleep if display is external
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This stops DCP from killing our modeset if the connection cycles.
Also force a (potential) configure cycle if the display is external;
this makes sure updated stage2s will have a chance at fixing issues of
old stage1s. Modesetting is fast when it's the same mode as before.
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 01:54:11 +09:00
Hector Martin
9748b5525e
dart: Only allocate a max of 2 L2 tables
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This is what iBoot normally does, and >2 will panic macOS
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 01:49:59 +09:00
Hector Martin
2bd6060f43
experiments/dcp_iboot.py: Fully shut down DCP when done
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 00:57:17 +09:00
Hector Martin
e9f383aa6b
m1n1.fw.dcp.dcpav: Add some DCPAV EPIC stuff
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 00:57:17 +09:00
Hector Martin
5c69011fc7
m1n1.fw.dcp.iboot: Fix padding
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 00:57:17 +09:00
Hector Martin
58db65db63
experiments/dcp_iboot.py: Shut down display before doing anything
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-06-01 00:57:17 +09:00