Commit graph

422 commits

Author SHA1 Message Date
Hector Martin
3a44625803 hv.py; mmiotrace: Show op width
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-28 00:00:54 +09:00
Hector Martin
77a36a7d34 utils,proxy: Add basic SIMD register fetch and mutation support
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 22:57:25 +09:00
Hector Martin
5d0f6e21f6 utils: Coerce address lookup addresses to int
If this is a wrapper class, "in range()" is not optimized and does a
linear scan through the range...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 22:14:09 +09:00
Hector Martin
ae55e1c5dc hv_vm: Add debug breadcrumbs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 22:05:23 +09:00
Hector Martin
f792b128c5 hv_vm: Suspend watchdog around mmiotrace event writes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 22:05:23 +09:00
Vincent Duvert
3d1747466b Add an option to disable checksumming if possible
* Introduce feature flags which allows the proxy and m1n1 to determine which
features they have in common.
* Add a feature flag that disables checksumming (by replacing checksums with
constant values) for the data packets exchanged by REQ_MEMREAD, REQ_MEMWRITE
and REQ_EVENT. The feature is enabled if m1n1 supports it; checksumming is kept
enabled for UART communication.
* To ensure no packet loss when checksumming is disabled, an extra sentinel
value is added after the exchanged data for memory read/write operations.

Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-05-27 21:34:37 +09:00
Janne Grunau
16f0abe6bb hv.py: resolve adresses from ADT in mmiotrace
Signed-off-by: Janne Grunau <j@jannau.net>
2021-05-27 21:32:05 +09:00
Janne Grunau
67cdf57540 adt.py: add option to retrieve the adt from m1n1
Signed-off-by: Janne Grunau <j@jannau.net>
2021-05-27 21:32:05 +09:00
Janne Grunau
07314994ed adt.py: raise AttributeError in ADTNode._getattr__()
Signed-off-by: Janne Grunau <j@jannau.net>
2021-05-27 21:32:05 +09:00
Hector Martin
2aa41192ed hv.py: Put back UART MMIO bypass
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:29:58 +09:00
Hector Martin
0f99ee834d hv.py: Put back most of the removed ADT nodes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:29:58 +09:00
Hector Martin
dedada1f57 hv.py: Remove sync mode from main MMIO region
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:29:58 +09:00
Hector Martin
85411d1714 hv_vm: Add support for 128-bit ops, stp/ldp, fix some emu bugs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:29:58 +09:00
Hector Martin
bfe8c94c47 hv_wdt: Add hypervisor watchdog on secondary core
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:28:43 +09:00
Hector Martin
c93f856c92 exception: Only enable IRQs on the primary core
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:28:43 +09:00
Hector Martin
0a91cc2b08 gxf: Make gl_call work with GXF or SPRR locked
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:28:43 +09:00
Hector Martin
a5a974791b hv: Support handling GL2 exceptions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:28:43 +09:00
Hector Martin
b1e09ad509 exception,gxf: Turn off PAN on exception entry
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:11:14 +09:00
Hector Martin
45960036c8 find_regs.py: Fix typo
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:10:37 +09:00
Hector Martin
aa72f50e50 iodev: Do not print leading * for empty buffer prints on alt path
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:10:00 +09:00
Hector Martin
0786894201 uart: Add uart_printf()
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:09:48 +09:00
Hector Martin
532b43f0a4 utils: debug_printf: Use vsnprintf instead of vsprintf
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-27 21:09:15 +09:00
Hector Martin
f44942015f hv.py: Current mmiotrace config/experiments
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
5d8b3a1ab1 hv.py: Remove more devices for testing
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
59cf1a1bcd hv.py: Map low physmem to the guest
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
81808da562 hv_exc: Set the step timer to 100 cycles
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
e92e075fba hv_exc: Add IPI and guest timer FIQ virtualization
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
c943af62b9 hv: Enable FIQ trapping
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
75f206e65c hv_exc, hv.py: Add support for interrupting guest with ^C
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
1ce8d8b706 hv: Add hv_write_hcr() to handle GXF
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
2e014f58fa hv: Implement a periodic hypervisor ptimer and use vtimer for stepping
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
76c283deba hv_vm: Delay after sync mmiotrace events
This allows the USB hardware to get a chance to deliver the packets to
the host, in case the poke would break it.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
1b1653dfe9 hv_vm: Simplify r31 handling, move LR adjustment to hv_exc.c
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
ba3a1b1028 hacr_trap_bits.py: Enable GXF around checks
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
48c7fc725b cpu_regs.h: Add IPI and VM timer reg defines
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
e484d6df70 cpu_regs.h: Add Apple-defined exception types
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
b1f55015eb arm_cpu_regs.h: Add sysreg exception ISS bit defines
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
74b8863a7f arm_cpu_regs.h: Add timer bit defines
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
e99680cb1e hv: Rename HV_HOOK proxy start type to HV
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 20:12:20 +09:00
Hector Martin
25f4500cea utils.h: Do sysreg defines in a way that allows extracting the fields
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 19:51:08 +09:00
Hector Martin
3b6f32775b apple_regs.json: IPI and VM timer reg bit definitions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 19:50:05 +09:00
Hector Martin
0192bd6617 gxf: Add gxf_enabled()
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-25 19:49:12 +09:00
Hector Martin
989625ac65 adt.py: Support /-separated node path accesses 2021-05-22 04:42:38 +09:00
Hector Martin
4cc22c73c0 hv.py: Add a novm mode without stage 2 translation
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 04:42:38 +09:00
Hector Martin
81bf0ad578 apple_regs.json: More GXF and SPRR registers
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 04:42:38 +09:00
Hector Martin
aacbdf0949 GXF_STATUS -> GXF_STATUS_EL1
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 04:42:38 +09:00
Hector Martin
a9c189fe27 hv.py: Add more sysreg redirects
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 04:42:38 +09:00
Hector Martin
5f7aded3ce find_sprr_regs.py: Port to find_regs.py, fixes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 04:42:38 +09:00
Hector Martin
30e14f1a0b find_regs: Modular version of find_all_regs.py
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 03:21:01 +09:00
Hector Martin
3bc591708b apple_regs.json: Add GXF_CONFIG_EL{2, 12}
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-22 03:21:01 +09:00