Commit graph

903 commits

Author SHA1 Message Date
Sasha Finkelstein
62ff43f095 kboot: Pass through SEPFW and boot object manifests
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
2024-11-11 22:46:25 +09:00
Nick Chan
87a1279b86 kboot: Fix get_notchless_fb() on notched Macs
Fixes: 5bb8f04bdf ("kboot: Add workarounds for ADT for A7-A11 SoCs.")
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-11-11 22:08:51 +09:00
Janne Grunau
3854c7668a pmgr: Fix false positive u8 pmgr ID detection on modern SoCs
The id1 field used on oder SoCs is not constant 0 for all devices on
t8122. Instead just compare the id1 fields of the two first devices.
Fixes "pmgr: Failed to find parent #36 for IOA0\n" errors in
pmgr_init().

Fixes: fb59dc03ca ("pmgr: Fix struct for older SoCs")
Signed-off-by: Janne Grunau <j@jannau.net>
2024-11-03 23:15:09 +09:00
Janne Grunau
a603b86e6b smp: Handle boot CPU index != 0
Signed-off-by: Janne Grunau <j@jannau.net>
2024-11-03 19:16:43 +09:00
Janne Grunau
293e122845 startup: Determine boot CPU by cpu[N].state ADT property
Signed-off-by: Janne Grunau <j@jannau.net>
2024-11-03 19:03:57 +09:00
Nick Chan
4bde778779 usb: Skip USB init for now on A7-A11 SoCs.
We do not support the USB controller on A7-A11 SoCs yet, but still do not
try to init dwc3 on them.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
fb59dc03ca pmgr: Fix struct for older SoCs
At some point Apple ran out of bits and have to widen the device field
to 16-bit. This adds support for the old 8-bit layout.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
9ca6d1c16f exceptions: add el3_call()
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
1fd17b8933 exceptions: fix el0_call() and el1_call() when running in EL1
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
5b8cfd1e7c kboot: Reserve secondary CPU stacks
The secondary CPU may potentially use the stack after leaving WFE.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
5bb8f04bdf kboot: Add workarounds for ADT for A7-A11 SoCs.
Account for the differences between the iOS ADT and macOS ADT, and also
some physical differences between Apple Silicon Macs and A7-A11 devoces,
reflected in the ADT.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
d0889bda14 fb: Add A7-A11 device support
This includes:
- Do not treat iPhone 5 buffer as dummy on 5s
- Added support for 24-bit framebuffer
- When we have a vertical display, use whole fb as console

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
c28d6b7172 smp: Add A7-A9X cache errata workaround
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
da3519de14 smp: Add support for deep sleep on A7-A9X
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
dadc48ed10 smp: Write _vectors_start into boot CPU rvbar where possible
On A7-A11 we have a ROM exploit and we can keep CPU0 RVBAR unlocked.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
3b7fd2ce5e smp: Add support for ADT from old FW
Old ADT does not have /cpus/cpu<n>/cpu-impl-reg, and the value is in
/arm-io/pmgr/reg[2*n+2].

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
cb0ceb4ee8 smp: Added A7-A11 start support
This includes:

- EL3 handling
- "Slow" IPI support
- New start offsets

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
32ca84c769 memory: Add support for 4K translation
Add support for 4K page sizes, supported by A7-A8X.

Co-developed-by: fenfenS <104295404+fenfenS@users.noreply.github.com>
Signed-off-by: fenfenS <104295404+fenfenS@users.noreply.github.com>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
f4ca3a19fd Add support for different boot-args revisions.
Boot-args version 1 (iOS 12), and version 3 (iOS 18, macOS 15).

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
869d2ae35c Skip over features unsupported in A7-A11 SoCs.
This includes
- GXF
- SPRR
- PAN (A7-A9)
- Atomics (A7-A10)
- FIPI (A7-A10)
- DCP

SPRR on T8030 seems to be quite different from M1 (at least according to
qemu-t8030), so keep it disabled for those CPU parts.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
accb393510 Add support for handling EL3.
A7-A9X has an EL3. Handle it (without SMP support).

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
5dfb07f3da chickens: Add A7-A11 chickens
Cyclone and Typhoon are similar enough to share a file.

Hurricane and Zephyr are the physical cores on A10 backing the
Hurricane-Zephyr logical core.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
5560190b36 utils: Add more functions to detect CPU features
These functions will be used to skip over parts not supported by A7-A11 SoCs.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
Nick Chan
226ec5298d soc: Added UART bases for A7-A11, T2 SoCs.
Add UART bases for A7-A11, T2 SoCs.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
2024-10-31 01:32:39 +09:00
a-ramses
b78a3a20d6 assigning already existing flag with name for HID3
Signed-off-by: a-ramses <abdicheramzi@gmail.com>
2024-10-31 01:26:30 +09:00
Daniel Berlin
3a8068a73d Cleanup and name some previouly-unnamed registers
Signed-off-by: Daniel Berlin <dberlin@dberlin.org>
2024-10-31 01:22:58 +09:00
Daniel Berlin
61cf1084d0 Support cpufreq for t6031
This seems to work, and matches the info i can find.

Signed-off-by: Daniel Berlin <dberlin@dberlin.org>
2024-10-31 01:17:40 +09:00
Daniel Berlin
4b0fde22a3 Support new version of AIC used by M3
Small changes, mostly some offsts are now available in the DT,
and a mask change.

Signed-off-by: Daniel Berlin <dberlin@dberlin.org>
2024-10-31 01:17:00 +09:00
Sasha Finkelstein
6b83e98e30 clk: Revert PDM clock initialization.
AOP does it itself, and doing it in m1n1 confuses it into not
being able to boot.

Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
2024-10-29 05:27:00 +09:00
Hector Martin
277e8e71de display: Exclude j413 from Sequoia workaround by changing the logic
It seems this model does not need it *and* it somehow causes
nondeterministic problems.

Also add a delay to the poweroff/on sequence to be more conservative.

Fixes: #406
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-09-28 22:22:15 +09:00
Daniel Berlin
69d241ccc2 Give AMX context reg a name.
This register is used to store AMX context information.

Signed-off-by: Daniel Berlin <dberlin@dberlin.org>
2024-09-25 08:27:13 +09:00
Sasha Finkelstein
a42c839120 z2: Deal with missing calibration data
(by not sending anything in that case)

Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
2024-09-25 08:26:16 +09:00
Janne Grunau
48837f4d47 kboot: Expose m1n1 console log in phram MTD reserved memory node
This registers a log buffer IODEV similar to the frame buffer IODEV. It
is using a console IODEV to allow writing to the buffer until m1n1 jumps
to the next stage. This allows also to increase the buffer size without
increasing m1n1's size. The current CONSOLE_BUFFER_SIZE of 8k is not
large enough to hold the entire log of executing m1n1 under the
hypervisor on the M1 Ultra Mac Studio.

Signed-off-by: Janne Grunau <j@jannau.net>
2024-09-25 08:25:42 +09:00
Janne Grunau
1d5556ccf3 kboot: Expose ADT in phram MTD reserved memory node
Requires CONFIG_MTD_PHRAM in Linux.

Signed-off-by: Janne Grunau <j@jannau.net>
2024-09-25 08:25:42 +09:00
Janne Grunau
d76dd3a16e kboot: Add param for no-map proterty in dt_get_or_add_reserved_mem()
Signed-off-by: Janne Grunau <j@jannau.net>
2024-09-25 08:25:42 +09:00
Janne Grunau
2ef60e6360 hv: Use architectural ACTLR_EL12 on M2+ for secondary init
Fixes: 99571e5 ("hv: Use architectural ACTLR_EL12 on M2+")
Signed-off-by: Janne Grunau <j@jannau.net>
2024-09-25 08:22:45 +09:00
Asahi Lina
99571e5308 hv: Use architectural ACTLR_EL12 on M2+
Signed-off-by: Asahi Lina <lina@asahilina.net>
2024-09-22 01:09:43 +09:00
Hector Martin
83ac04c1a9 fb: Fix FB junk leftover from stage1 in stage2
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-09-18 00:00:22 +09:00
Hector Martin
9741ff9b97 fb: Fix UAF after fb shutdown
fb_console_reserve_lines() in mmu_shutdown() was causing a blit from the
freed framebuffer, putting heap metadata junk at the top left corner.

Signed-off-by: Hector Martin <marcan@marcan.st>
2024-09-17 23:59:29 +09:00
Hector Martin
cdb6d41aa2 display: Add workaround for Sequoia DCP handoff bug
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-09-17 23:42:42 +09:00
Hector Martin
793ca17209 firmware: Add 15.0 and function to check SFW against a range
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-09-17 23:42:05 +09:00
Hector Martin
8a122f86c4 exception: Fix EL1 exception return path
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-08-11 20:21:21 +09:00
Janne Grunau
421dfa4252 dcp: Fix firmware mapping check on t8103/t600x
t8103 and t600x use "asc-dram-mask" in iop-dcp-nub to mask bits out of
DMA addresses. This needs to be used in the firmware mappings
check/remap since the segments have maskable bits sets.

Fixes: 8332e24 ("dcp: Undo carnage from bad stage1 DART code")
Signed-off-by: Janne Grunau <j@jannau.net>
2024-05-18 14:51:24 +09:00
Janne Grunau
56feda2b5e dart: Fix parsing of variable lenght "vm-base" property
Signed-off-by: Janne Grunau <j@jannau.net>
2024-05-18 14:51:24 +09:00
Hector Martin
dfffdf6609 display: Avoid placing FBs at IOVA 0
Also search harder for a matching dcp/disp iova, in case it matters.

Fixes: #391
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 10:22:55 +09:00
Hector Martin
1841d88dcd clang-format: Gate out 18.1.6 changes
So `make format` in Fedora doesn't disagree with CI...

Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 02:18:29 +09:00
Hector Martin
4f8ddca920 clang-format 18.1.6 changes
This isn't in Fedora yet...

Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 02:16:14 +09:00
Hector Martin
387cc2ecec kboot_gpu: Fix warnings
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 02:05:12 +09:00
Hector Martin
657654ac09 clang-format 18
Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 02:05:12 +09:00
Hector Martin
8332e2454c dcp: Undo carnage from bad stage1 DART code
A bug in our DART code was wiping and aliasing page tables. Go through
the segment ranges for DCP and redo any missing mappings. If we redid
any mappings, then PMGR reset DCP so it can recover from having faulted
on the previous boot.

Signed-off-by: Hector Martin <marcan@marcan.st>
2024-05-17 01:57:34 +09:00