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https://github.com/AsahiLinux/m1n1
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dcp: add dptx-phy support for j473/t8112
Phy "implementation" is just a replay of a macos trace with an 1920x1080 display.
This commit is contained in:
Janne Grunau
parent
43fa9185f6
commit
c1f14a4738
6 changed files with 557 additions and 4 deletions
2
Makefile
2
Makefile
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@ -74,7 +74,7 @@ LIBFDT_OBJECTS := $(patsubst %,libfdt/%, \
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fdt_wip.o fdt.o)
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DCP_OBJECTS := $(patsubst %,dcp/%, \
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dptxep.o parser.o)
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dptx_phy.o dptxep.o parser.o)
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OBJECTS := \
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adt.o \
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12
src/dcp/dp_phy.h
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12
src/dcp/dp_phy.h
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: MIT */
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#ifndef DCP_DP_PHY_H
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#define DCP_DP_PHY_H
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typedef struct dptx_phy dptx_phy_t;
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int dptx_phy_configure(dptx_phy_t *phy, int state);
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dptx_phy_t *dptx_phy_init(const char *phy_path);
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void dptx_phy_shutdown(dptx_phy_t *phy);
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#endif /* DCP_DP_PHY_H */
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529
src/dcp/dptx_phy.c
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529
src/dcp/dptx_phy.c
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@ -0,0 +1,529 @@
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/* SPDX-License-Identifier: MIT */
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#include "dp_phy.h"
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#include "dptxep.h"
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#include "malloc.h"
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#include "../adt.h"
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#include "../utils.h"
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typedef struct dptx_phy {
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u64 regs[2];
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} dptx_phy_t;
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static int dptx_phy_activate(dptx_phy_t *phy)
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{
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#if 1
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// MMIO: R.4 0x23c500010 (dptx-phy[1], offset 0x10) = 0x0
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read32(phy->regs[1] + 0x10);
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// MMIO: W.4 0x23c500010 (dptx-phy[1], offset 0x10) = 0x0
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write32(phy->regs[1] + 0x10, 0x0);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x444
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x454
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write32(phy->regs[1] + 0x48, 0x454);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x454
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x474
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write32(phy->regs[1] + 0x48, 0x474);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x474
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x434
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write32(phy->regs[1] + 0x48, 0x434);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x434
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x534
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write32(phy->regs[1] + 0x48, 0x534);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x534
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x734
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write32(phy->regs[1] + 0x48, 0x734);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x734
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x334
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write32(phy->regs[1] + 0x48, 0x334);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x334
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x335
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write32(phy->regs[1] + 0x48, 0x335);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x335
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x337
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write32(phy->regs[1] + 0x48, 0x337);
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// MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x337
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read32(phy->regs[1] + 0x48);
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// MMIO: W.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x333
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write32(phy->regs[1] + 0x48, 0x333);
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// MMIO: R.4 0x23c542014 (dptx-phy[0], offset 0x2014) = 0x80a0c
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read32(phy->regs[0] + 0x2014);
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// MMIO: W.4 0x23c542014 (dptx-phy[0], offset 0x2014) = 0x300a0c
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write32(phy->regs[0] + 0x2014, 0x300a0c);
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// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x644800
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read32(phy->regs[0] + 0x20b8);
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// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
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write32(phy->regs[0] + 0x20b8, 0x654800);
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// MMIO: R.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x11090a2
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read32(phy->regs[0] + 0x2220);
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// MMIO: W.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x11090a0
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write32(phy->regs[0] + 0x2220, 0x11090a0);
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// MMIO: R.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103003
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read32(phy->regs[0] + 0x222c);
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// MMIO: W.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103803
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write32(phy->regs[0] + 0x222c, 0x103803);
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// MMIO: R.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103803
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read32(phy->regs[0] + 0x222c);
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// MMIO: W.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103903
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write32(phy->regs[0] + 0x222c, 0x103903);
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// MMIO: R.4 0x23c542230 (dptx-phy[0], offset 0x2230) = 0x2308804
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read32(phy->regs[0] + 0x2230);
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// MMIO: W.4 0x23c542230 (dptx-phy[0], offset 0x2230) = 0x2208804
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write32(phy->regs[0] + 0x2230, 0x2208804);
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// MMIO: R.4 0x23c542278 (dptx-phy[0], offset 0x2278) = 0x18300811
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read32(phy->regs[0] + 0x2278);
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// MMIO: W.4 0x23c542278 (dptx-phy[0], offset 0x2278) = 0x10300811
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write32(phy->regs[0] + 0x2278, 0x10300811);
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// MMIO: R.4 0x23c5422a4 (dptx-phy[0], offset 0x22a4) = 0x1044200
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read32(phy->regs[0] + 0x22a4);
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// MMIO: W.4 0x23c5422a4 (dptx-phy[0], offset 0x22a4) = 0x1044201
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write32(phy->regs[0] + 0x22a4, 0x1044201);
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// MMIO: R.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x18030
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read32(phy->regs[0] + 0x4008);
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// MMIO: W.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x30030
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write32(phy->regs[0] + 0x4008, 0x30030);
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// MMIO: R.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x30030
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read32(phy->regs[0] + 0x4008);
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// MMIO: W.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x30010
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write32(phy->regs[0] + 0x4008, 0x30010);
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// MMIO: R.4 0x23c54420c (dptx-phy[0], offset 0x420c) = 0x88e3
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read32(phy->regs[0] + 0x420c);
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// MMIO: W.4 0x23c54420c (dptx-phy[0], offset 0x420c) = 0x88c3
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write32(phy->regs[0] + 0x420c, 0x88c3);
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// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x0
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read32(phy->regs[0] + 0x4600);
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// MMIO: W.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
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write32(phy->regs[0] + 0x4600, 0x8000000);
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// MMIO: R.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x21780
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read32(phy->regs[0] + 0x5040);
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// MMIO: W.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x221780
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write32(phy->regs[0] + 0x5040, 0x221780);
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// MMIO: R.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x21780
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read32(phy->regs[0] + 0x6040);
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// MMIO: W.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x221780
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write32(phy->regs[0] + 0x6040, 0x221780);
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// MMIO: R.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x21780
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read32(phy->regs[0] + 0x7040);
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// MMIO: W.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x221780
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write32(phy->regs[0] + 0x7040, 0x221780);
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// MMIO: R.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x21780
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read32(phy->regs[0] + 0x8040);
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// MMIO: W.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x221780
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write32(phy->regs[0] + 0x8040, 0x221780);
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// MMIO: R.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x221780
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read32(phy->regs[0] + 0x5040);
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// MMIO: W.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x2a1780
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write32(phy->regs[0] + 0x5040, 0x2a1780);
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// MMIO: R.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x221780
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read32(phy->regs[0] + 0x6040);
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// MMIO: W.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x2a1780
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write32(phy->regs[0] + 0x6040, 0x2a1780);
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// MMIO: R.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x221780
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read32(phy->regs[0] + 0x7040);
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// MMIO: W.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x2a1780
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write32(phy->regs[0] + 0x7040, 0x2a1780);
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// MMIO: R.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x221780
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read32(phy->regs[0] + 0x8040);
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// MMIO: W.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x2a1780
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write32(phy->regs[0] + 0x8040, 0x2a1780);
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// MMIO: R.4 0x23c545244 (dptx-phy[0], offset 0x5244) = 0x18
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read32(phy->regs[0] + 0x5244);
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// MMIO: W.4 0x23c545244 (dptx-phy[0], offset 0x5244) = 0x8
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write32(phy->regs[0] + 0x5244, 0x8);
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// MMIO: R.4 0x23c546244 (dptx-phy[0], offset 0x6244) = 0x18
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read32(phy->regs[0] + 0x6244);
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// MMIO: W.4 0x23c546244 (dptx-phy[0], offset 0x6244) = 0x8
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write32(phy->regs[0] + 0x6244, 0x8);
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// MMIO: R.4 0x23c547244 (dptx-phy[0], offset 0x7244) = 0x18
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read32(phy->regs[0] + 0x7244);
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// MMIO: W.4 0x23c547244 (dptx-phy[0], offset 0x7244) = 0x8
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write32(phy->regs[0] + 0x7244, 0x8);
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// MMIO: R.4 0x23c548244 (dptx-phy[0], offset 0x8244) = 0x18
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read32(phy->regs[0] + 0x8244);
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// MMIO: W.4 0x23c548244 (dptx-phy[0], offset 0x8244) = 0x8
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write32(phy->regs[0] + 0x8244, 0x8);
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// MMIO: R.4 0x23c542214 (dptx-phy[0], offset 0x2214) = 0x1e0
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read32(phy->regs[0] + 0x2214);
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// MMIO: W.4 0x23c542214 (dptx-phy[0], offset 0x2214) = 0x1e1
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write32(phy->regs[0] + 0x2214, 0x1e1);
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// MMIO: R.4 0x23c542224 (dptx-phy[0], offset 0x2224) = 0x20086001
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read32(phy->regs[0] + 0x2224);
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// MMIO: W.4 0x23c542224 (dptx-phy[0], offset 0x2224) = 0x20086000
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write32(phy->regs[0] + 0x2224, 0x20086000);
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// MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2000
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read32(phy->regs[0] + 0x2200);
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// MMIO: W.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
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write32(phy->regs[0] + 0x2200, 0x2002);
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// MMIO: R.4 0x23c541000 (dptx-phy[0], offset 0x1000) = 0xe0000003
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read32(phy->regs[0] + 0x1000);
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// MMIO: W.4 0x23c541000 (dptx-phy[0], offset 0x1000) = 0xe0000001
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write32(phy->regs[0] + 0x1000, 0xe0000001);
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// MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x41
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read32(phy->regs[0] + 0x4004);
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// MMIO: W.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
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write32(phy->regs[0] + 0x4004, 0x49);
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// MMIO: R.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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read32(phy->regs[0] + 0x4404);
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// MMIO: W.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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write32(phy->regs[0] + 0x4404, 0x555d444);
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// MMIO: R.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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read32(phy->regs[0] + 0x4404);
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// MMIO: W.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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write32(phy->regs[0] + 0x4404, 0x555d444);
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// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
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read32(phy->regs[0] + 0x4000);
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// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
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write32(phy->regs[0] + 0x4000, 0x41021ac);
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// MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
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read32(phy->regs[0] + 0x5000);
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// MMIO: W.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
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write32(phy->regs[0] + 0x5000, 0x300);
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// MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
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read32(phy->regs[0] + 0x6000);
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// MMIO: W.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
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write32(phy->regs[0] + 0x6000, 0x300);
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// MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
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read32(phy->regs[0] + 0x7000);
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// MMIO: W.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
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write32(phy->regs[0] + 0x7000, 0x300);
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// MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
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read32(phy->regs[0] + 0x8000);
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// MMIO: W.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
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write32(phy->regs[0] + 0x8000, 0x300);
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// MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
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read32(phy->regs[0] + 0x5000);
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// MMIO: W.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
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write32(phy->regs[0] + 0x5000, 0x300);
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// MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
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read32(phy->regs[0] + 0x6000);
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// MMIO: W.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
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write32(phy->regs[0] + 0x6000, 0x300);
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// MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
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read32(phy->regs[0] + 0x7000);
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// MMIO: W.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
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write32(phy->regs[0] + 0x7000, 0x300);
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// MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
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read32(phy->regs[0] + 0x8000);
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// MMIO: W.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
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write32(phy->regs[0] + 0x8000, 0x300);
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// MMIO: R.4 0x23c544200 (dptx-phy[0], offset 0x4200) = 0x4002430
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read32(phy->regs[0] + 0x4200);
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// MMIO: W.4 0x23c544200 (dptx-phy[0], offset 0x4200) = 0x4002420
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write32(phy->regs[0] + 0x4200, 0x4002420);
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// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
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read32(phy->regs[0] + 0x4600);
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// MMIO: W.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
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write32(phy->regs[0] + 0x4600, 0x8000000);
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// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
|
||||
read32(phy->regs[0] + 0x4600);
|
||||
// MMIO: W.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000001
|
||||
write32(phy->regs[0] + 0x4600, 0x8000001);
|
||||
// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000001
|
||||
read32(phy->regs[0] + 0x4600);
|
||||
// MMIO: W.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000003
|
||||
write32(phy->regs[0] + 0x4600, 0x8000003);
|
||||
// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000043
|
||||
read32(phy->regs[0] + 0x4600);
|
||||
// MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000043
|
||||
read32(phy->regs[0] + 0x4600);
|
||||
// MMIO: W.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000041
|
||||
write32(phy->regs[0] + 0x4600, 0x8000041);
|
||||
// MMIO: R.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x482
|
||||
read32(phy->regs[0] + 0x4408);
|
||||
// MMIO: W.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x482
|
||||
write32(phy->regs[0] + 0x4408, 0x482);
|
||||
// MMIO: R.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x482
|
||||
read32(phy->regs[0] + 0x4408);
|
||||
// MMIO: W.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x483
|
||||
write32(phy->regs[0] + 0x4408, 0x483);
|
||||
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dptx_phy_set_active_lane_count(dptx_phy_t *phy)
|
||||
{
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// <ep:27 0085000000000000 ()
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x41021ac);
|
||||
// MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
read32(phy->regs[0] + 0x5000);
|
||||
// MMIO: W.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
write32(phy->regs[0] + 0x5000, 0x300);
|
||||
// MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
read32(phy->regs[0] + 0x6000);
|
||||
// MMIO: W.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
write32(phy->regs[0] + 0x6000, 0x300);
|
||||
// MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
read32(phy->regs[0] + 0x7000);
|
||||
// MMIO: W.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
write32(phy->regs[0] + 0x7000, 0x300);
|
||||
// MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
read32(phy->regs[0] + 0x8000);
|
||||
// MMIO: W.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
write32(phy->regs[0] + 0x8000, 0x300);
|
||||
// MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
read32(phy->regs[0] + 0x5000);
|
||||
// MMIO: W.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
write32(phy->regs[0] + 0x5000, 0x300);
|
||||
// >ep:28 00a2000000000280 ()
|
||||
// MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
read32(phy->regs[0] + 0x6000);
|
||||
// <ep:28 0085000000000000 ()
|
||||
// MMIO: W.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
write32(phy->regs[0] + 0x6000, 0x300);
|
||||
// MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
read32(phy->regs[0] + 0x7000);
|
||||
// MMIO: W.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
write32(phy->regs[0] + 0x7000, 0x300);
|
||||
// MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
read32(phy->regs[0] + 0x8000);
|
||||
// MMIO: W.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
write32(phy->regs[0] + 0x8000, 0x300);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dptx_phy_set_link_rate(dptx_phy_t *phy)
|
||||
{
|
||||
// MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
read32(phy->regs[0] + 0x4004);
|
||||
// MMIO: W.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
write32(phy->regs[0] + 0x4004, 0x49);
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x41021ac);
|
||||
// MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
read32(phy->regs[0] + 0x4004);
|
||||
// MMIO: W.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x41
|
||||
write32(phy->regs[0] + 0x4004, 0x41);
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// >ep:27 00a2000000000300 ()
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x41021ac);
|
||||
// <ep:27 0085000000000000 ()
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x41021ac);
|
||||
// MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
|
||||
read32(phy->regs[0] + 0x2200);
|
||||
// MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
|
||||
read32(phy->regs[0] + 0x2200);
|
||||
// MMIO: W.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2000
|
||||
write32(phy->regs[0] + 0x2200, 0x2000);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
write32(phy->regs[0] + 0x100c, 0xf000);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf008
|
||||
write32(phy->regs[0] + 0x100c, 0xf008);
|
||||
// MMIO: R.4 0x23c541014 (dptx-phy[0], offset 0x1014) = 0x1
|
||||
read32(phy->regs[0] + 0x1014);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf008
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
write32(phy->regs[0] + 0x100c, 0xf000);
|
||||
// MMIO: R.4 0x23c541008 (dptx-phy[0], offset 0x1008) = 0x1
|
||||
read32(phy->regs[0] + 0x1008);
|
||||
// MMIO: R.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x11090a0
|
||||
read32(phy->regs[0] + 0x2220);
|
||||
// MMIO: W.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x1109020
|
||||
write32(phy->regs[0] + 0x2220, 0x1109020);
|
||||
// MMIO: R.4 0x23c5420b0 (dptx-phy[0], offset 0x20b0) = 0x1e0e01c2
|
||||
read32(phy->regs[0] + 0x20b0);
|
||||
// MMIO: W.4 0x23c5420b0 (dptx-phy[0], offset 0x20b0) = 0x1e0e01c2
|
||||
write32(phy->regs[0] + 0x20b0, 0x1e0e01c2);
|
||||
// MMIO: R.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
|
||||
read32(phy->regs[0] + 0x20b4);
|
||||
// MMIO: W.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
|
||||
write32(phy->regs[0] + 0x20b4, 0x7fffffe);
|
||||
// MMIO: R.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
|
||||
read32(phy->regs[0] + 0x20b4);
|
||||
// MMIO: W.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
|
||||
write32(phy->regs[0] + 0x20b4, 0x7fffffe);
|
||||
// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
read32(phy->regs[0] + 0x20b8);
|
||||
// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
write32(phy->regs[0] + 0x20b8, 0x654800);
|
||||
// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
read32(phy->regs[0] + 0x20b8);
|
||||
// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
write32(phy->regs[0] + 0x20b8, 0x654800);
|
||||
// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
read32(phy->regs[0] + 0x20b8);
|
||||
// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
write32(phy->regs[0] + 0x20b8, 0x654800);
|
||||
// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
|
||||
read32(phy->regs[0] + 0x20b8);
|
||||
// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x454800
|
||||
write32(phy->regs[0] + 0x20b8, 0x454800);
|
||||
// MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x454800
|
||||
read32(phy->regs[0] + 0x20b8);
|
||||
// MMIO: W.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x454800
|
||||
write32(phy->regs[0] + 0x20b8, 0x454800);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x0
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
|
||||
write32(phy->regs[1] + 0xa0, 0x8);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
write32(phy->regs[1] + 0xa0, 0xc);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x4000c
|
||||
write32(phy->regs[1] + 0xa0, 0x4000c);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x4000c
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
write32(phy->regs[1] + 0xa0, 0xc);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8000c
|
||||
write32(phy->regs[1] + 0xa0, 0x8000c);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8000c
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
write32(phy->regs[1] + 0xa0, 0xc);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
|
||||
write32(phy->regs[1] + 0xa0, 0x8);
|
||||
// MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
|
||||
read32(phy->regs[1] + 0xa0);
|
||||
// MMIO: W.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x0
|
||||
write32(phy->regs[1] + 0xa0, 0x0);
|
||||
// MMIO: R.4 0x23c542000 (dptx-phy[0], offset 0x2000) = 0x2
|
||||
read32(phy->regs[0] + 0x2000);
|
||||
// MMIO: W.4 0x23c542000 (dptx-phy[0], offset 0x2000) = 0x2
|
||||
write32(phy->regs[0] + 0x2000, 0x2);
|
||||
// MMIO: R.4 0x23c542018 (dptx-phy[0], offset 0x2018) = 0x0
|
||||
read32(phy->regs[0] + 0x2018);
|
||||
// MMIO: W.4 0x23c542018 (dptx-phy[0], offset 0x2018) = 0x0
|
||||
write32(phy->regs[0] + 0x2018, 0x0);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf007
|
||||
write32(phy->regs[0] + 0x100c, 0xf007);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf007
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf00f
|
||||
write32(phy->regs[0] + 0x100c, 0xf00f);
|
||||
// MMIO: R.4 0x23c541014 (dptx-phy[0], offset 0x1014) = 0x38f
|
||||
read32(phy->regs[0] + 0x1014);
|
||||
// MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf00f
|
||||
read32(phy->regs[0] + 0x100c);
|
||||
// MMIO: W.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf007
|
||||
write32(phy->regs[0] + 0x100c, 0xf007);
|
||||
// MMIO: R.4 0x23c541008 (dptx-phy[0], offset 0x1008) = 0x9
|
||||
read32(phy->regs[0] + 0x1008);
|
||||
// MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2000
|
||||
read32(phy->regs[0] + 0x2200);
|
||||
// MMIO: W.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
|
||||
write32(phy->regs[0] + 0x2200, 0x2002);
|
||||
// MMIO: R.4 0x23c545010 (dptx-phy[0], offset 0x5010) = 0x18003000
|
||||
read32(phy->regs[0] + 0x5010);
|
||||
// MMIO: W.4 0x23c545010 (dptx-phy[0], offset 0x5010) = 0x18003000
|
||||
write32(phy->regs[0] + 0x5010, 0x18003000);
|
||||
// MMIO: R.4 0x23c546010 (dptx-phy[0], offset 0x6010) = 0x18003000
|
||||
read32(phy->regs[0] + 0x6010);
|
||||
// MMIO: W.4 0x23c546010 (dptx-phy[0], offset 0x6010) = 0x18003000
|
||||
write32(phy->regs[0] + 0x6010, 0x18003000);
|
||||
// MMIO: R.4 0x23c547010 (dptx-phy[0], offset 0x7010) = 0x18003000
|
||||
read32(phy->regs[0] + 0x7010);
|
||||
// MMIO: W.4 0x23c547010 (dptx-phy[0], offset 0x7010) = 0x18003000
|
||||
write32(phy->regs[0] + 0x7010, 0x18003000);
|
||||
// MMIO: R.4 0x23c548010 (dptx-phy[0], offset 0x8010) = 0x18003000
|
||||
read32(phy->regs[0] + 0x8010);
|
||||
// MMIO: W.4 0x23c548010 (dptx-phy[0], offset 0x8010) = 0x18003000
|
||||
write32(phy->regs[0] + 0x8010, 0x18003000);
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x51021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x51021ac);
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x51021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x71021ac
|
||||
write32(phy->regs[0] + 0x4000, 0x71021ac);
|
||||
// MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x41
|
||||
read32(phy->regs[0] + 0x4004);
|
||||
// MMIO: W.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
write32(phy->regs[0] + 0x4004, 0x49);
|
||||
// MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x71021ac
|
||||
read32(phy->regs[0] + 0x4000);
|
||||
// MMIO: W.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x71021ec
|
||||
write32(phy->regs[0] + 0x4000, 0x71021ec);
|
||||
// MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
read32(phy->regs[0] + 0x4004);
|
||||
// MMIO: W.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x48
|
||||
write32(phy->regs[0] + 0x4004, 0x48);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dptx_phy_configure(dptx_phy_t *phy, int state)
|
||||
{
|
||||
switch (state) {
|
||||
case DPTX_APCALL_ACTIVATE:
|
||||
return dptx_phy_activate(phy);
|
||||
case DPTX_APCALL_SET_ACTIVE_LANE_COUNT:
|
||||
return dptx_phy_set_active_lane_count(phy);
|
||||
case DPTX_APCALL_SET_LINK_RATE:
|
||||
return dptx_phy_set_link_rate(phy);
|
||||
default:
|
||||
printf("DPtx-phy: ignore unkown state:%d\n", state);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
dptx_phy_t *dptx_phy_init(const char *phy_node)
|
||||
{
|
||||
int adt_phy_path[8];
|
||||
|
||||
int node = adt_path_offset_trace(adt, phy_node, adt_phy_path);
|
||||
if (node < 0) {
|
||||
printf("DPtx-phy: Error getting phy node %s\n", phy_node);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
dptx_phy_t *phy = calloc(sizeof *phy, 1);
|
||||
if (!phy)
|
||||
return NULL;
|
||||
|
||||
if (adt_get_reg(adt, adt_phy_path, "reg", 0, &phy->regs[0], NULL) < 0) {
|
||||
printf("DPtx-phy: failed to get %s.reg[0]\n", phy_node);
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
if (adt_get_reg(adt, adt_phy_path, "reg", 1, &phy->regs[1], NULL) < 0) {
|
||||
printf("DPtx-phy: failed to get %s.reg[1]\n", phy_node);
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
return phy;
|
||||
|
||||
out_err:
|
||||
free(phy);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void dptx_phy_shutdown(dptx_phy_t *phy)
|
||||
{
|
||||
free(phy);
|
||||
}
|
||||
|
|
@ -5,6 +5,7 @@
|
|||
#include <string.h>
|
||||
|
||||
#include "dptxep.h"
|
||||
#include "dp_phy.h"
|
||||
#include "malloc.h"
|
||||
#include "parser.h"
|
||||
|
||||
|
|
@ -65,6 +66,7 @@ struct epic_service_call {
|
|||
typedef struct dcp_dptx_if {
|
||||
afk_epic_ep_t *epic; // ensure an afk_epic_ep_t pointer can be used as dcp_dptx_if_t
|
||||
dcp_dev_t *dcp;
|
||||
dptx_phy_t *phy;
|
||||
|
||||
int channel;
|
||||
struct dptx_port port[2];
|
||||
|
|
@ -363,6 +365,10 @@ static int dptxport_call_set_tiled_display_hint(afk_epic_service_t *service, voi
|
|||
static int dptxport_call(afk_epic_service_t *service, u32 idx, const void *data, size_t data_size,
|
||||
void *reply, size_t reply_size)
|
||||
{
|
||||
dcp_dptx_if_t *dptx = service->intf;
|
||||
if (dptx->phy)
|
||||
dptx_phy_configure(dptx->phy, idx);
|
||||
|
||||
switch (idx) {
|
||||
case DPTX_APCALL_WILL_CHANGE_LINKG_CONFIG:
|
||||
return dptxport_call_will_change_link_config(service);
|
||||
|
|
@ -460,11 +466,13 @@ static const afk_epic_service_ops_t dcp_dptx_ops = {
|
|||
.call = dptxport_call,
|
||||
};
|
||||
|
||||
int dcp_dptx_connect(dcp_dptx_if_t *dptx, u32 port)
|
||||
int dcp_dptx_connect(dcp_dptx_if_t *dptx, dptx_phy_t *phy, u32 port)
|
||||
{
|
||||
if (!dptx->port[port].service)
|
||||
return -1;
|
||||
|
||||
dptx->phy = phy;
|
||||
|
||||
// dptx->port[port].atcphy = phy;
|
||||
// dptxport_validate_connection(dptx->port[port].service, 0, 5, 0);
|
||||
dptxport_connect(dptx->port[port].service, 0, 5, 0);
|
||||
|
|
|
|||
|
|
@ -4,6 +4,8 @@
|
|||
#ifndef __APPLE_DCP_DPTXEP_H__
|
||||
#define __APPLE_DCP_DPTXEP_H__
|
||||
|
||||
#include "dp_phy.h"
|
||||
|
||||
#include "../dcp.h"
|
||||
#include "../types.h"
|
||||
|
||||
|
|
@ -51,7 +53,7 @@ enum dptx_link_rate {
|
|||
dcp_dptx_if_t *dcp_dptx_init(dcp_dev_t *dcp);
|
||||
int dcp_dptx_shutdown(dcp_dptx_if_t *dptx);
|
||||
|
||||
int dcp_dptx_connect(dcp_dptx_if_t *dptx, u32 port);
|
||||
int dcp_dptx_connect(dcp_dptx_if_t *dptx, dptx_phy_t *phy, u32 port);
|
||||
int dcp_dptx_disconnect(dcp_dptx_if_t *dptx, u32 port);
|
||||
int dcp_dptx_hpd(dcp_dptx_if_t *dptx, u32 port, bool hpd);
|
||||
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
#include "utils.h"
|
||||
#include "xnuboot.h"
|
||||
|
||||
#include "dcp/dp_phy.h"
|
||||
#include "dcp/dptxep.h"
|
||||
|
||||
#define DISPLAY_STATUS_DELAY 100
|
||||
|
|
@ -218,7 +219,8 @@ int display_start_dcp(void)
|
|||
return -1;
|
||||
}
|
||||
|
||||
dcp_dptx_connect(dptx, 0);
|
||||
dptx_phy_t *dpphy = dptx_phy_init("/arm-io/dptx-phy");
|
||||
dcp_dptx_connect(dptx, dpphy, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue