mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-11-10 01:34:12 +00:00
Update to clang-format 17
Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
parent
ebec2d362d
commit
95d67cf9d2
5 changed files with 32 additions and 25 deletions
11
.github/workflows/main.yml
vendored
11
.github/workflows/main.yml
vendored
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@ -2,7 +2,7 @@
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name: format-check
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# Controls when the action will run.
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# Controls when the action will run.
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on:
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# Triggers the workflow on push or pull request events but only for the main branch
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push:
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@ -27,7 +27,14 @@ jobs:
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rm -f ~/.cargo/bin/cargo-fmt
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rustup toolchain install nightly --component rustfmt --component clippy --allow-downgrade
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- name: install clang-format-17
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run: |
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wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | sudo apt-key add -
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sudo add-apt-repository 'deb http://apt.llvm.org/jammy/ llvm-toolchain-jammy-17 main'
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sudo apt update
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sudo apt install clang-format-17
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- name: Run format-check
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run: |
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make format-check
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make format-check CLANG_FORMAT=clang-format-17
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make rustfmt-check
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4
Makefile
4
Makefile
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@ -22,14 +22,14 @@ CC := $(TOOLCHAIN)clang --target=$(ARCH)
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AS := $(TOOLCHAIN)clang --target=$(ARCH)
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LD := $(TOOLCHAIN)ld.lld
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OBJCOPY := $(TOOLCHAIN)llvm-objcopy
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CLANG_FORMAT := $(TOOLCHAIN)clang-format
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CLANG_FORMAT ?= $(TOOLCHAIN)clang-format
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EXTRA_CFLAGS ?=
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else
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CC := $(TOOLCHAIN)$(ARCH)gcc
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AS := $(TOOLCHAIN)$(ARCH)gcc
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LD := $(TOOLCHAIN)$(ARCH)ld
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OBJCOPY := $(TOOLCHAIN)$(ARCH)objcopy
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CLANG_FORMAT := clang-format
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CLANG_FORMAT ?= clang-format
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EXTRA_CFLAGS ?= -Wstack-usage=2048
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endif
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@ -7,7 +7,7 @@
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#include "utils.h"
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#define MASK_REG(x) (4 * ((x) >> 5))
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#define MASK_BIT(x) BIT((x)&GENMASK(4, 0))
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#define MASK_BIT(x) BIT((x) & GENMASK(4, 0))
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static struct aic aic1 = {
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.version = 1,
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@ -156,7 +156,7 @@
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/* Global Configuration Register */
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#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
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#define DWC3_GCTL_U2RSTECN (1 << 16)
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#define DWC3_GCTL_RAMCLKSEL(x) (((x)&DWC3_GCTL_CLK_MASK) << 6)
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#define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6)
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#define DWC3_GCTL_CLK_BUS (0)
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#define DWC3_GCTL_CLK_PIPE (1)
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#define DWC3_GCTL_CLK_PIPEHALF (2)
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@ -184,8 +184,8 @@
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#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
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/* Global TX Fifo Size Register */
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#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n)&0xffff)
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#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n)&0xffff0000)
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#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)
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#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
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/* Global HWPARAMS1 Register */
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#define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
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@ -283,12 +283,12 @@
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#define DWC3_DSTS_DEVCTRLHLT (1 << 22)
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#define DWC3_DSTS_USBLNKST_MASK (0x0f << 18)
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#define DWC3_DSTS_USBLNKST(n) (((n)&DWC3_DSTS_USBLNKST_MASK) >> 18)
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#define DWC3_DSTS_USBLNKST(n) (((n) & DWC3_DSTS_USBLNKST_MASK) >> 18)
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#define DWC3_DSTS_RXFIFOEMPTY (1 << 17)
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#define DWC3_DSTS_SOFFN_MASK (0x3fff << 3)
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#define DWC3_DSTS_SOFFN(n) (((n)&DWC3_DSTS_SOFFN_MASK) >> 3)
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#define DWC3_DSTS_SOFFN(n) (((n) & DWC3_DSTS_SOFFN_MASK) >> 3)
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#define DWC3_DSTS_CONNECTSPD (7 << 0)
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@ -396,8 +396,8 @@ enum dwc3_link_state {
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/* TRB Length, PCM and Status */
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#define DWC3_TRB_SIZE_MASK (0x00ffffff)
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#define DWC3_TRB_SIZE_LENGTH(n) ((n)&DWC3_TRB_SIZE_MASK)
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#define DWC3_TRB_SIZE_PCM1(n) (((n)&0x03) << 24)
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#define DWC3_TRB_SIZE_LENGTH(n) ((n) & DWC3_TRB_SIZE_MASK)
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#define DWC3_TRB_SIZE_PCM1(n) (((n) & 0x03) << 24)
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#define DWC3_TRB_SIZE_TRBSTS(n) (((n) & (0x0f << 28)) >> 28)
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#define DWC3_TRBSTS_OK 0
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@ -410,10 +410,10 @@ enum dwc3_link_state {
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#define DWC3_TRB_CTRL_LST (1 << 1)
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#define DWC3_TRB_CTRL_CHN (1 << 2)
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#define DWC3_TRB_CTRL_CSP (1 << 3)
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#define DWC3_TRB_CTRL_TRBCTL(n) (((n)&0x3f) << 4)
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#define DWC3_TRB_CTRL_TRBCTL(n) (((n) & 0x3f) << 4)
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#define DWC3_TRB_CTRL_ISP_IMI (1 << 10)
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#define DWC3_TRB_CTRL_IOC (1 << 11)
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#define DWC3_TRB_CTRL_SID_SOFN(n) (((n)&0xffff) << 14)
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#define DWC3_TRB_CTRL_SID_SOFN(n) (((n) & 0xffff) << 14)
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#define DWC3_TRBCTL_NORMAL DWC3_TRB_CTRL_TRBCTL(1)
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#define DWC3_TRBCTL_CONTROL_SETUP DWC3_TRB_CTRL_TRBCTL(2)
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@ -439,14 +439,14 @@ struct dwc3_trb {
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} PACKED;
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/* HWPARAMS0 */
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#define DWC3_MODE(n) ((n)&0x7)
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#define DWC3_MODE(n) ((n) & 0x7)
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#define DWC3_MODE_DEVICE 0
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#define DWC3_MODE_HOST 1
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#define DWC3_MODE_DRD 2
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#define DWC3_MODE_HUB 3
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#define DWC3_MDWIDTH(n) (((n)&0xff00) >> 8)
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#define DWC3_MDWIDTH(n) (((n) & 0xff00) >> 8)
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/* HWPARAMS1 */
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#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15)
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@ -458,7 +458,7 @@ struct dwc3_trb {
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#define DWC3_NUM_IN_EPS(p) (((p)->hwparams3 & (DWC3_NUM_IN_EPS_MASK)) >> 18)
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/* HWPARAMS7 */
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#define DWC3_RAM1_DEPTH(n) ((n)&0xffff)
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#define DWC3_RAM1_DEPTH(n) ((n) & 0xffff)
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#define DWC3_REVISION_173A 0x5533173a
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#define DWC3_REVISION_175A 0x5533175a
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@ -605,20 +605,20 @@ union dwc3_event {
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struct dwc3_event_gevt gevt;
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};
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#define DWC3_DEPCFG_EP_TYPE(n) (((n)&0x3) << 1)
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#define DWC3_DEPCFG_EP_NUMBER(n) (((n)&0x1f) << 25)
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#define DWC3_DEPCFG_FIFO_NUMBER(n) (((n)&0xf) << 17)
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#define DWC3_DEPCFG_MAX_PACKET_SIZE(n) (((n)&0x7ff) << 3)
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#define DWC3_DEPCFG_EP_TYPE(n) (((n) & 0x3) << 1)
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#define DWC3_DEPCFG_EP_NUMBER(n) (((n) & 0x1f) << 25)
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#define DWC3_DEPCFG_FIFO_NUMBER(n) (((n) & 0xf) << 17)
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#define DWC3_DEPCFG_MAX_PACKET_SIZE(n) (((n) & 0x7ff) << 3)
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#define DWC3_DEPCFG_INT_NUM(n) (((n)&0x1f) << 0)
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#define DWC3_DEPCFG_INT_NUM(n) (((n) & 0x1f) << 0)
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#define DWC3_DEPCFG_XFER_COMPLETE_EN BIT(8)
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#define DWC3_DEPCFG_XFER_IN_PROGRESS_EN BIT(9)
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#define DWC3_DEPCFG_XFER_NOT_READY_EN BIT(10)
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#define DWC3_DEPCFG_FIFO_ERROR_EN BIT(11)
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#define DWC3_DEPCFG_STREAM_EVENT_EN BIT(13)
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#define DWC3_DEPCFG_BINTERVAL_M1(n) (((n)&0xff) << 16)
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#define DWC3_DEPCFG_BINTERVAL_M1(n) (((n) & 0xff) << 16)
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#define DWC3_DEPCFG_STREAM_CAPABLE BIT(24)
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#define DWC3_DEPCFG_EP_NUMBER(n) (((n)&0x1f) << 25)
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#define DWC3_DEPCFG_EP_NUMBER(n) (((n) & 0x1f) << 25)
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#define DWC3_DEPCFG_BULK_BASED BIT(30)
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#define DWC3_DEPCFG_FIFO_BASED BIT(31)
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@ -400,7 +400,7 @@ void spin_init(spinlock_t *lock);
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void spin_lock(spinlock_t *lock);
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void spin_unlock(spinlock_t *lock);
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#define mdelay(m) udelay((m)*1000)
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#define mdelay(m) udelay((m) * 1000)
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#define panic(fmt, ...) \
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do { \
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