From a58abbcfc4580c8d43935e2aecc6fa151509bf5b Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Thu, 20 Dec 2018 23:40:54 -0300
Subject: [PATCH] shader_ir: Add predicate combiner helper
---
src/video_core/shader/shader_ir.cpp | 12 ++++++++++++
src/video_core/shader/shader_ir.h | 3 +++
2 files changed, 15 insertions(+)
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index 20a1a50ef..aec1fb36b 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -309,6 +309,18 @@ Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition
return predicate;
}
+OperationCode ShaderIR::GetPredicateCombiner(PredOperation operation) {
+ static const std::unordered_map<PredOperation, OperationCode> PredicateOperationTable = {
+ {PredOperation::And, OperationCode::LogicalAnd},
+ {PredOperation::Or, OperationCode::LogicalOr},
+ {PredOperation::Xor, OperationCode::LogicalXor},
+ };
+
+ const auto op = PredicateOperationTable.find(operation);
+ UNIMPLEMENTED_IF_MSG(op == PredicateOperationTable.end(), "Unknown predicate operation");
+ return op->second;
+}
+
void ShaderIR::SetRegister(BasicBlock& bb, Register dest, Node src) {
bb.push_back(Operation(OperationCode::Assign, GetRegister(dest), src));
}
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h
index 372ed10da..f13129ab3 100644
--- a/src/video_core/shader/shader_ir.h
+++ b/src/video_core/shader/shader_ir.h
@@ -669,6 +669,9 @@ private:
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
const MetaHalfArithmetic& meta, Node op_a, Node op_b);
+ /// Returns a predicate combiner operation
+ OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
+
template <typename... T>
inline Node Operation(OperationCode code, const T*... operands) {
return StoreNode(OperationNode(code, operands...));