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Correct CNTPCT to use Clock Cycles instead of Cpu Cycles.
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parent
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commit
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3 changed files with 13 additions and 2 deletions
src/core
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@ -12,6 +12,7 @@
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#include "core/core.h"
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#include "core/core_cpu.h"
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#include "core/core_timing.h"
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#include "core/core_timing_util.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/hle/kernel/process.h"
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#include "core/hle/kernel/svc.h"
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@ -119,7 +120,7 @@ public:
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return std::max(parent.core_timing.GetDowncount(), 0);
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}
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u64 GetCNTPCT() override {
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return parent.core_timing.GetTicks();
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return CpuCyclesToClockCycles(parent.core_timing.GetTicks());
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}
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ARM_Dynarmic& parent;
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@ -151,7 +152,7 @@ std::unique_ptr<Dynarmic::A64::Jit> ARM_Dynarmic::MakeJit() const {
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config.tpidr_el0 = &cb->tpidr_el0;
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config.dczid_el0 = 4;
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config.ctr_el0 = 0x8444c004;
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config.cntfrq_el0 = 19200000; // Value from fusee.
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config.cntfrq_el0 = Timing::CNTFREQ; // Value from fusee.
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// Unpredictable instructions
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config.define_unpredictable_behaviour = true;
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@ -60,4 +60,11 @@ s64 nsToCycles(u64 ns) {
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return (BASE_CLOCK_RATE * static_cast<s64>(ns)) / 1000000000;
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}
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u64 CpuCyclesToClockCycles(u64 ticks) {
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u64 result = ticks;
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result *= CNTFREQ;
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result /= BASE_CLOCK_RATE;
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return static_cast<u64>(result);
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}
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} // namespace Core::Timing
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@ -11,6 +11,7 @@ namespace Core::Timing {
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// The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz
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// The exact value used is of course unverified.
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constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked
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constexpr u64 CNTFREQ = 19200000; // Value from fusee.
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inline s64 msToCycles(int ms) {
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// since ms is int there is no way to overflow
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@ -61,4 +62,6 @@ inline u64 cyclesToMs(s64 cycles) {
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return cycles * 1000 / BASE_CLOCK_RATE;
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}
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u64 CpuCyclesToClockCycles(u64 ticks);
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} // namespace Core::Timing
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