mirror of
https://github.com/yuzu-mirror/yuzu
synced 2024-11-28 08:10:17 +00:00
Shader_IR: ICMP corrections and fixes
This commit is contained in:
parent
4b81d19a1a
commit
527b841c15
2 changed files with 11 additions and 6 deletions
|
@ -1636,6 +1636,7 @@ public:
|
||||||
ICMP_RC,
|
ICMP_RC,
|
||||||
ICMP_R,
|
ICMP_R,
|
||||||
ICMP_CR,
|
ICMP_CR,
|
||||||
|
ICMP_IMM,
|
||||||
MUFU, // Multi-Function Operator
|
MUFU, // Multi-Function Operator
|
||||||
RRO_C, // Range Reduction Operator
|
RRO_C, // Range Reduction Operator
|
||||||
RRO_R,
|
RRO_R,
|
||||||
|
@ -1903,6 +1904,7 @@ private:
|
||||||
INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"),
|
INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"),
|
||||||
INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"),
|
INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"),
|
||||||
INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"),
|
INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"),
|
||||||
|
INST("0011011-0100----", Id::ICMP_IMM, Type::ArithmeticInteger, "ICMP_IMM"),
|
||||||
INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"),
|
INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"),
|
||||||
INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"),
|
INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"),
|
||||||
INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"),
|
INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"),
|
||||||
|
|
|
@ -140,11 +140,11 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
|
||||||
}
|
}
|
||||||
case OpCode::Id::ICMP_CR:
|
case OpCode::Id::ICMP_CR:
|
||||||
case OpCode::Id::ICMP_R:
|
case OpCode::Id::ICMP_R:
|
||||||
case OpCode::Id::ICMP_RC: {
|
case OpCode::Id::ICMP_RC:
|
||||||
UNIMPLEMENTED_IF(instr.icmp.is_signed != 0);
|
case OpCode::Id::ICMP_IMM: {
|
||||||
const Node zero = Immediate(0);
|
const Node zero = Immediate(0);
|
||||||
|
|
||||||
const auto [op_a, op_b] = [&]() -> std::tuple<Node, Node> {
|
const auto [op_b, test] = [&]() -> std::pair<Node, Node> {
|
||||||
switch (opcode->get().GetId()) {
|
switch (opcode->get().GetId()) {
|
||||||
case OpCode::Id::ICMP_CR:
|
case OpCode::Id::ICMP_CR:
|
||||||
return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
|
return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
|
||||||
|
@ -154,13 +154,16 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
|
||||||
case OpCode::Id::ICMP_RC:
|
case OpCode::Id::ICMP_RC:
|
||||||
return {GetRegister(instr.gpr39),
|
return {GetRegister(instr.gpr39),
|
||||||
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
|
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
|
||||||
|
case OpCode::Id::ICMP_IMM:
|
||||||
|
return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
|
||||||
default:
|
default:
|
||||||
UNIMPLEMENTED();
|
UNREACHABLE();
|
||||||
return {zero, zero};
|
return {zero, zero};
|
||||||
}
|
}
|
||||||
}();
|
}();
|
||||||
const Node test = GetRegister(instr.gpr8);
|
const Node op_a = GetRegister(instr.gpr8);
|
||||||
const Node comparison = GetPredicateComparisonInteger(instr.icmp.cond, false, test, zero);
|
const Node comparison =
|
||||||
|
GetPredicateComparisonInteger(instr.icmp.cond, instr.icmp.is_signed != 0, test, zero);
|
||||||
SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
|
SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue