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GPU: Added register definitions for the stencil parameters.
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5f119bed56
commit
3d3b10adc7
1 changed files with 25 additions and 2 deletions
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@ -520,7 +520,18 @@ public:
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u32 enable[NumRenderTargets];
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} blend;
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INSERT_PADDING_WORDS(0xB);
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struct {
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u32 enable;
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u32 front_op_fail;
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u32 front_op_zfail;
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u32 front_op_zpass;
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u32 front_func_func;
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u32 front_func_ref;
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u32 front_func_mask;
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u32 front_mask;
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} stencil;
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INSERT_PADDING_WORDS(0x3);
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union {
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BitField<4, 1, u32> triangle_rast_flip;
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@ -556,7 +567,17 @@ public:
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}
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} tic;
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INSERT_PADDING_WORDS(0x21);
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INSERT_PADDING_WORDS(0x5);
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struct {
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u32 enable;
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u32 back_op_fail;
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u32 back_op_zfail;
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u32 back_op_zpass;
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u32 back_func_func;
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} stencil_two_side;
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INSERT_PADDING_WORDS(0x17);
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union {
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BitField<2, 1, u32> coord_origin;
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@ -851,10 +872,12 @@ ASSERT_REG_POSITION(depth_write_enabled, 0x4BA);
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ASSERT_REG_POSITION(d3d_cull_mode, 0x4C2);
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ASSERT_REG_POSITION(depth_test_func, 0x4C3);
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ASSERT_REG_POSITION(blend, 0x4CF);
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ASSERT_REG_POSITION(stencil, 0x4E0);
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ASSERT_REG_POSITION(screen_y_control, 0x4EB);
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ASSERT_REG_POSITION(vb_element_base, 0x50D);
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ASSERT_REG_POSITION(tsc, 0x557);
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ASSERT_REG_POSITION(tic, 0x55D);
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ASSERT_REG_POSITION(stencil_two_side, 0x565);
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ASSERT_REG_POSITION(point_coord_replace, 0x581);
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ASSERT_REG_POSITION(code_address, 0x582);
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ASSERT_REG_POSITION(draw, 0x585);
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