Mirrors/yuzu
2
0
Fork 0
mirror of https://github.com/yuzu-mirror/yuzu synced 2024-12-24 07:13:07 +00:00
Code Issues Projects Releases Packages Wiki Activity

shader: Address feedback

Browse source
This commit is contained in:
FernandoS27 2021-04-18 10:08:22 +02:00 committed by ameerj
parent 881b33da3b
commit 2999028976
2 changed files with 10 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
View file

@ -184,16 +184,19 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
BitField<49, 1, u64> abs; BitField<49, 1, u64> abs;
BitField<10, 2, FloatFormat> src_size; BitField<10, 2, FloatFormat> src_size;
BitField<41, 1, u64> selector; BitField<41, 1, u64> selector;
BitField<20, 20, u64> imm; BitField<20, 19, u64> imm;
BitField<56, 1, u64> imm_neg;
} const f2f{insn}; } const f2f{insn};
IR::F16F32F64 src_a; IR::F16F32F64 src_a;
switch (f2f.src_size) { switch (f2f.src_size) {
case FloatFormat::F16: { case FloatFormat::F16: {
const u32 imm{static_cast<u32>(f2f.imm & 0x00ffff)}; const u32 imm{static_cast<u32>(f2f.imm & 0x0000ffff)};
IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))}; const IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))};
src_a = IR::F16{ir.CompositeExtract(vector, 0)}; src_a = IR::F16{ir.CompositeExtract(vector, f2f.selector != 0 ? 0 : 1)};
if (f2f.imm_neg != 0) {
throw NotImplementedException("Neg bit on F16");
}
break; break;
} }
case FloatFormat::F32: case FloatFormat::F32:
@ -206,6 +209,6 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
throw NotImplementedException("Invalid dest format {}", f2f.src_size.Value()); throw NotImplementedException("Invalid dest format {}", f2f.src_size.Value());
} }
F2F(*this, insn, src_a, f2f.abs != 0); F2F(*this, insn, src_a, f2f.abs != 0);
} // namespace Shader::Maxwell }
} // namespace Shader::Maxwell } // namespace Shader::Maxwell

2
src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp
View file

@ -83,7 +83,7 @@ void IADD3(TranslatorVisitor& v, u64 insn, IR::U32 op_b, IR::U32 op_c) {
lhs = v.ir.IAdd(lhs, carry); lhs = v.ir.IAdd(lhs, carry);
} }
if (iadd3.cc != 0 && iadd3.shift == Shift::Left) { if (iadd3.cc != 0 && iadd3.shift == Shift::Left) {
IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))}; const IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))};
of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits)); of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits));
} }
lhs = IntegerShift(v.ir, lhs, iadd3.shift); lhs = IntegerShift(v.ir, lhs, iadd3.shift);