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shader_ir/memory: Reduce severity of ST_L cache management and log it

This commit is contained in:
ReinUsesLisp 2019-04-01 23:03:32 -03:00
parent a6d5ff05dc
commit 24abeb9a67
2 changed files with 11 additions and 3 deletions
src/video_core
engines
shader/decode

View file

@ -387,6 +387,13 @@ enum class IpaSampleMode : u64 {
Offset = 2,
};
enum class LmemStoreCacheManagement : u64 {
Default = 0,
CG = 1,
CS = 2,
WT = 3,
};
struct IpaMode {
IpaInterpMode interpolation_mode;
IpaSampleMode sampling_mode;
@ -782,7 +789,7 @@ union Instruction {
} ld_l;
union {
BitField<44, 2, u64> unknown;
BitField<44, 2, LmemStoreCacheManagement> cache_management;
} st_l;
union {

View file

@ -8,6 +8,7 @@
#include "common/assert.h"
#include "common/common_types.h"
#include "common/logging/log.h"
#include "video_core/engines/shader_bytecode.h"
#include "video_core/shader/shader_ir.h"
@ -205,8 +206,8 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
break;
}
case OpCode::Id::ST_L: {
UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
static_cast<u32>(instr.st_l.unknown.Value()));
LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}",
static_cast<u64>(instr.st_l.cache_management.Value()));
const auto GetLmemAddr = [&](s32 offset) {
ASSERT(offset % 4 == 0);