vimrc/sources_non_forked/vim-snippets/snippets/verilog.snippets
2019-12-12 23:01:52 +01:00

83 lines
1.1 KiB
Text

# if statement
snippet if
if (${1}) begin
${0}
end
# If/else statements
snippet ife
if (${1}) begin
${2}
end
else begin
${1}
end
# Else if statement
snippet eif
else if (${1}) begin
${0}
end
#Else statement
snippet el
else begin
${0}
end
# While statement
snippet wh
while (${1}) begin
${0}
end
# Repeat Loop
snippet rep
repeat (${1}) begin
${0}
end
# Case statement
snippet case
case (${1:/* variable */})
${2:/* value */}: begin
${3}
end
default: begin
${4}
end
endcase
# CaseZ statement
snippet casez
casez (${1:/* variable */})
${2:/* value */}: begin
${3}
end
default: begin
${4}
end
endcase
# Always block
snippet al
always @(${1:/* sensitive list */}) begin
${0}
end
# Module block
snippet mod
module ${1:module_name} (${2});
${0}
endmodule
# For
snippet for
for (int ${2:i} = 0; $2 < ${1:count}; $2${3:++}) begin
${4}
end
# Forever
snippet forev
forever begin
${0}
end
# Function
snippet fun
function ${1:void} ${2:name}(${3});
${0}
endfunction: $2
# Task
snippet task
task ${1:name}(${2});
${0}
endtask: $1