vimrc/sources_non_forked/ale/doc/ale-vhdl.txt
2020-12-04 22:15:32 +01:00

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===============================================================================
ALE VHDL Integration *ale-vhdl-options*
===============================================================================
ALE can use four different linters for VHDL:
ghdl:
Using `ghdl --std=08`
ModelSim/Questa
Using `vcom -2008 -quiet -lint`
Vivado
Using `xvhdl --2008`
HDL Checker
Using `hdl_checker --lsp`
===============================================================================
General notes
ghdl, ModelSim/Questa and Vivado linters default to VHDL-2008 support. This,
and other options, can be changed with each linter's respective option
variable.
Linters/compilers that utilize a "work" directory for analyzing designs- such
as ModelSim and Vivado- can be passed the location of these directories as
part of their respective option strings listed below. This is useful for
holistic analysis of a file (e.g. a design with components, packages, or other
code defined external to the current file as part of a larger project) or
when wanting to simply pass an alternative location for the auto-generated
work directories (such as '/tmp') so as to not muddle the current directory.
Since these type of linters often use this work directory for holding compiled
design data as part of a single build process, they sometimes cannot handle
the frequent, asynchronous application launches when linting while text is
changing. This can happen in the form of hangs or crashes. To help prevent
this when using these linters, it may help to run linting less frequently; for
example, only when a file is saved.
HDL Checker is an alternative for some of the issues described above. It wraps
around ghdl, Vivado and ModelSim/Questa and, when using the latter, it can
handle mixed language (VHDL, Verilog, SystemVerilog) designs.
===============================================================================
ghdl *ale-vhdl-ghdl*
g:ale_vhdl_ghdl_executable *g:ale_vhdl_ghdl_executable*
*b:ale_vhdl_ghdl_executable*
Type: |String|
Default: `'ghdl'`
This variable can be changed to the path to the 'ghdl' executable.
g:ale_vhdl_ghdl_options *g:ale_vhdl_ghdl_options*
*b:ale_vhdl_ghdl_options*
Type: |String|
Default: `'--std=08'`
This variable can be changed to modify the flags/options passed to 'ghdl'.
===============================================================================
hdl-checker *ale-vhdl-hdl-checker*
HDL Checker is a wrapper for VHDL/Verilg/SystemVerilog tools that aims to
reduce the boilerplate code needed to set things up. It can automatically
infer libraries for VHDL sources, determine the compilation order and provide
some static checks.
You can install it using pip:
>
$ pip install hdl-checker
`hdl-checker` will be run from a detected project root, determined by the
following methods, in order:
1. Find the first directory containing a configuration file (see
|g:ale_hdl_checker_config_file|)
2. If no configuration file can be found, find the first directory containing
a folder named `'.git'
3. If no such folder is found, use the directory of the current buffer
g:ale_hdl_checker_executable
*g:ale_hdl_checker_executable*
*b:ale_hdl_checker_executable*
Type: |String|
Default: `'hdl_checker'`
This variable can be changed to the path to the 'hdl_checker' executable.
g:ale_hdl_checker_options *g:ale_hdl_checker_options*
*b:ale_hdl_checker_options*
Type: |String|
Default: `''`
This variable can be changed to modify the flags/options passed to the
'hdl_checker' server startup command.
g:ale_hdl_checker_config_file *g:ale_hdl_checker_config_file*
*b:ale_hdl_checker_config_file*
Type: |String|
Default: `'.hdl_checker.config'` (Unix),
`'_hdl_checker.config'` (Windows)
This variable can be changed to modify the config file HDL Checker will try
to look for. It will also affect how the project's root directory is
determined (see |ale-vhdl-hdl-checker|).
More info on the configuration file format can be found at:
https://github.com/suoto/hdl_checker/wiki/Setting-up-a-project
===============================================================================
vcom *ale-vhdl-vcom*
g:ale_vhdl_vcom_executable *g:ale_vhdl_vcom_executable*
*b:ale_vhdl_vcom_executable*
Type: |String|
Default: `'vcom'`
This variable can be changed to the path to the 'vcom' executable.
g:ale_vhdl_vcom_options *g:ale_vhdl_vcom_options*
*b:ale_vhdl_vcom_options*
Type: |String|
Default: `'-2008 -quiet -lint'`
This variable can be changed to modify the flags/options passed to 'vcom'.
===============================================================================
xvhdl *ale-vhdl-xvhdl*
g:ale_vhdl_xvhdl_executable *g:ale_vhdl_xvhdl_executable*
*b:ale_vhdl_xvhdl_executable*
Type: |String|
Default: `'xvhdl'`
This variable can be changed to the path to the 'xvhdl' executable.
g:ale_vhdl_xvhdl_options *g:ale_vhdl_xvhdl_options*
*b:ale_vhdl_xvhdl_options*
Type: |String|
Default: `'--2008'`
This variable can be changed to modify the flags/options passed to 'xvhdl'.
===============================================================================
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