unleashed-firmware/applications/main/gpio/gpio_app_i.h
Kevin Kwok 72713d6f4e
Allow pins 0 and 1 as RTS/DTR for USB UART Bridge (#1864)
* Allow pins 0 and 1 as RTS/DTR for USB UART Bridge
* add logic to gpio_scene_usb_uart_config, fix flow_pins
* fixing count of pins
* disable PC0,PC1 RTS/DTR when using LPUART
* add logic to ensure flow pins dont overlap with uart lines

Co-authored-by: あく <alleteam@gmail.com>
2022-10-19 00:06:18 +09:00

39 lines
947 B
C

#pragma once
#include "gpio_app.h"
#include "gpio_item.h"
#include "scenes/gpio_scene.h"
#include "gpio_custom_event.h"
#include "usb_uart_bridge.h"
#include <gui/gui.h>
#include <gui/view_dispatcher.h>
#include <gui/scene_manager.h>
#include <gui/modules/submenu.h>
#include <notification/notification_messages.h>
#include <gui/modules/variable_item_list.h>
#include <gui/modules/widget.h>
#include "views/gpio_test.h"
#include "views/gpio_usb_uart.h"
struct GpioApp {
Gui* gui;
NotificationApp* notifications;
ViewDispatcher* view_dispatcher;
SceneManager* scene_manager;
Widget* widget;
VariableItemList* var_item_list;
VariableItem* var_item_flow;
GpioTest* gpio_test;
GpioUsbUart* gpio_usb_uart;
UsbUartBridge* usb_uart_bridge;
};
typedef enum {
GpioAppViewVarItemList,
GpioAppViewGpioTest,
GpioAppViewUsbUart,
GpioAppViewUsbUartCfg,
GpioAppViewUsbUartCloseRpc,
} GpioAppView;