mirror of
https://github.com/DarkFlippers/unleashed-firmware
synced 2024-12-23 11:13:09 +00:00
9df4d8e2ed
* LSE CSS: explicitly configure and start LSE + LSI1 and enable LSECSS at boot, enable LSECSS interrupt in firmware. * F4: backport LSE CSS shenanigans. * Split LSE/HSE CSS handling routines, add TODO for missing notification.
415 lines
10 KiB
C
415 lines
10 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32wbxx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Ultimate Liberty license
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* SLA0044, the "License"; You may not use this file except in compliance with
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* the License. You may obtain a copy of the License at:
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* www.st.com/SLA0044
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32wbxx_it.h"
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#include "FreeRTOS.h"
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#include "task.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_FS;
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extern ADC_HandleTypeDef hadc1;
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extern COMP_HandleTypeDef hcomp1;
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extern RTC_HandleTypeDef hrtc;
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extern TIM_HandleTypeDef htim1;
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extern TIM_HandleTypeDef htim2;
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extern TIM_HandleTypeDef htim16;
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extern TIM_HandleTypeDef htim17;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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HAL_RCC_NMI_IRQHandler();
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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if ((*(volatile uint32_t *)CoreDebug_BASE) & (1 << 0)) {
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__asm("bkpt 1");
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}
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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__asm("bkpt 1");
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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__asm("bkpt 1");
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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__asm("bkpt 1");
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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/* USER CODE BEGIN SysTick_IRQn 1 */
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HAL_IncTick();
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32WBxx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32wbxx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles RTC tamper and time stamp, CSS on LSE interrupts through EXTI line 18.
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*/
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void TAMP_STAMP_LSECSS_IRQHandler(void)
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{
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if (!LL_RCC_LSE_IsReady()) {
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// TODO: notify user about issue with LSE
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LL_RCC_ForceBackupDomainReset();
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LL_RCC_ReleaseBackupDomainReset();
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NVIC_SystemReset();
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}
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}
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/**
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* @brief This function handles RCC global interrupt.
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*/
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void RCC_IRQHandler(void)
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{
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/* USER CODE BEGIN RCC_IRQn 0 */
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/* USER CODE END RCC_IRQn 0 */
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/* USER CODE BEGIN RCC_IRQn 1 */
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/* USER CODE END RCC_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line1 interrupt.
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*/
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void EXTI1_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI1_IRQn 0 */
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/* USER CODE END EXTI1_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
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/* USER CODE BEGIN EXTI1_IRQn 1 */
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/* USER CODE END EXTI1_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line3 interrupt.
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*/
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void EXTI3_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI3_IRQn 0 */
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/* USER CODE END EXTI3_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
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/* USER CODE BEGIN EXTI3_IRQn 1 */
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/* USER CODE END EXTI3_IRQn 1 */
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}
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/**
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* @brief This function handles ADC1 global interrupt.
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*/
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void ADC1_IRQHandler(void)
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{
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/* USER CODE BEGIN ADC1_IRQn 0 */
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/* USER CODE END ADC1_IRQn 0 */
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HAL_ADC_IRQHandler(&hadc1);
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/* USER CODE BEGIN ADC1_IRQn 1 */
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/* USER CODE END ADC1_IRQn 1 */
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}
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/**
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* @brief This function handles USB low priority interrupt, USB wake-up interrupt through EXTI line 28.
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*/
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void USB_LP_IRQHandler(void)
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{
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/* USER CODE BEGIN USB_LP_IRQn 0 */
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/* USER CODE END USB_LP_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_FS);
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/* USER CODE BEGIN USB_LP_IRQn 1 */
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/* USER CODE END USB_LP_IRQn 1 */
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}
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/**
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* @brief This function handles COMP1 and COMP2 interrupts through EXTI lines 20 and 21.
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*/
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void COMP_IRQHandler(void)
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{
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/* USER CODE BEGIN COMP_IRQn 0 */
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/* USER CODE END COMP_IRQn 0 */
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HAL_COMP_IRQHandler(&hcomp1);
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/* USER CODE BEGIN COMP_IRQn 1 */
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/* USER CODE END COMP_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[9:5] interrupts.
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*/
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void EXTI9_5_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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/* USER CODE END EXTI9_5_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
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*/
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void TIM1_UP_TIM16_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
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/* USER CODE END TIM1_UP_TIM16_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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HAL_TIM_IRQHandler(&htim16);
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/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
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/* USER CODE END TIM1_UP_TIM16_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
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*/
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void TIM1_TRG_COM_TIM17_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 capture compare interrupt.
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*/
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void TIM1_CC_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_CC_IRQn 0 */
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/* USER CODE END TIM1_CC_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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/* USER CODE BEGIN TIM1_CC_IRQn 1 */
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/* USER CODE END TIM1_CC_IRQn 1 */
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}
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/**
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* @brief This function handles TIM2 global interrupt.
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*/
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void TIM2_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM2_IRQn 0 */
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/* USER CODE END TIM2_IRQn 0 */
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HAL_TIM_IRQHandler(&htim2);
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/* USER CODE BEGIN TIM2_IRQn 1 */
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/* USER CODE END TIM2_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[15:10] interrupts.
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*/
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void EXTI15_10_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI15_10_IRQn 0 */
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/* USER CODE END EXTI15_10_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
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/* USER CODE BEGIN EXTI15_10_IRQn 1 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14);
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/* USER CODE END EXTI15_10_IRQn 1 */
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}
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/**
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* @brief This function handles HSEM global interrupt.
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*/
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void HSEM_IRQHandler(void)
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{
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/* USER CODE BEGIN HSEM_IRQn 0 */
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/* USER CODE END HSEM_IRQn 0 */
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HAL_HSEM_IRQHandler();
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/* USER CODE BEGIN HSEM_IRQn 1 */
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/* USER CODE END HSEM_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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void EXTI4_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI4_IRQn 0 */
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/* USER CODE END EXTI4_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
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/* USER CODE BEGIN EXTI4_IRQn 1 */
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/* USER CODE END EXTI4_IRQn 1 */
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}
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extern void HW_TS_RTC_Wakeup_Handler();
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extern void HW_IPCC_Tx_Handler();
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extern void HW_IPCC_Rx_Handler();
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void RTC_WKUP_IRQHandler(void)
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{
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HW_TS_RTC_Wakeup_Handler();
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}
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void IPCC_C1_TX_IRQHandler(void)
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{
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HW_IPCC_Tx_Handler();
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}
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void IPCC_C1_RX_IRQHandler(void)
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{
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HW_IPCC_Rx_Handler();
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}
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/* USER CODE END 1 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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