mirror of
https://github.com/DarkFlippers/unleashed-firmware
synced 2024-12-21 02:03:18 +00:00
338fc3afea
* Updated stack to 1.17.0 * hal: ble: Fixed stack config * Bumped stack version in config * scripts: added validation of copro stack version in update bundles * Copro: update to 1.17.2 * FuriHal: adjust tick frequency for HSE as sys clk * FuriHal: adjust systick reload on sys clock change * Sync api and format sources * scripts: updated ob.data for newer stack * FuriHal: return core2 hse pll transition on deep sleep * FuriHal: cleanup ble glue * FuriHal: rework ble glue, allow shci_send in critical section * FuriHal: sync api symbols * FuriHal: cleanup BLE glue, remove unused garbage and duplicate declarations * FuriHal: BLE glue cleanup, 2nd iteration * FuriHal: hide tick drift reports under FURI_HAL_OS_DEBUG * Lib: sync stm32wb_copro with latest dev * FuriHal: ble-glue, slightly less editable device name and duplicate definition cleanup * FuriHal: update ble config options, enable some optimizations and ext adv * FuriHal: update clock switch method documentation * FuriHal: better SNBRSA bug workaround fix * FuriHal: complete comment about tick skew * FuriHal: proper condition in clock hsi2hse transition * FuriHal: move PLL start to hse2pll routine, fix lockup caused by core2 switching to HSE before us * FuriHal: explicit HSE start before switch * FuriHal: fix documentation and move flash latency change to later stage, remove duplicate LL_RCC_SetRFWKPClockSource call --------- Co-authored-by: hedger <hedger@nanode.su> Co-authored-by: hedger <hedger@users.noreply.github.com>
80 lines
1.9 KiB
C
80 lines
1.9 KiB
C
#pragma once
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#include <stm32wbxx_ll_rcc.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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FuriHalClockMcoLse,
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FuriHalClockMcoSysclk,
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FuriHalClockMcoMsi100k,
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FuriHalClockMcoMsi200k,
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FuriHalClockMcoMsi400k,
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FuriHalClockMcoMsi800k,
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FuriHalClockMcoMsi1m,
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FuriHalClockMcoMsi2m,
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FuriHalClockMcoMsi4m,
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FuriHalClockMcoMsi8m,
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FuriHalClockMcoMsi16m,
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FuriHalClockMcoMsi24m,
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FuriHalClockMcoMsi32m,
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FuriHalClockMcoMsi48m,
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} FuriHalClockMcoSourceId;
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typedef enum {
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FuriHalClockMcoDiv1 = LL_RCC_MCO1_DIV_1,
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FuriHalClockMcoDiv2 = LL_RCC_MCO1_DIV_2,
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FuriHalClockMcoDiv4 = LL_RCC_MCO1_DIV_4,
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FuriHalClockMcoDiv8 = LL_RCC_MCO1_DIV_8,
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FuriHalClockMcoDiv16 = LL_RCC_MCO1_DIV_16,
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} FuriHalClockMcoDivisorId;
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/** Early initialization */
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void furi_hal_clock_init_early();
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/** Early deinitialization */
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void furi_hal_clock_deinit_early();
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/** Initialize clocks */
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void furi_hal_clock_init();
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/** Switch clock from HSE to HSI */
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void furi_hal_clock_switch_hse2hsi();
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/** Switch clock from HSI to HSE */
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void furi_hal_clock_switch_hsi2hse();
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/** Switch clock from HSE to PLL
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*
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* @return true if changed, false if failed or not possible at this moment
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*/
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bool furi_hal_clock_switch_hse2pll();
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/** Switch clock from PLL to HSE
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*
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* @return true if changed, false if failed or not possible at this moment
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*/
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bool furi_hal_clock_switch_pll2hse();
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/** Stop SysTick counter without resetting */
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void furi_hal_clock_suspend_tick();
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/** Continue SysTick counter operation */
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void furi_hal_clock_resume_tick();
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/** Enable clock output on MCO pin
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*
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* @param source MCO clock source
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* @param div MCO clock division
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*/
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void furi_hal_clock_mco_enable(FuriHalClockMcoSourceId source, FuriHalClockMcoDivisorId div);
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/** Disable clock output on MCO pin */
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void furi_hal_clock_mco_disable();
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#ifdef __cplusplus
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}
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#endif
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