mirror of
https://github.com/DarkFlippers/unleashed-firmware
synced 2024-12-22 02:33:10 +00:00
3c2711102c
* Lib: move cube to libs. Firmware: prepare for code base refactoring, detach from cube, port to cmsis_os2. * Firmware, target f2: regenerate project with latest cube package, tim17 for os ticks. * Firmware: unified codebase. * Core: do not include semaphore on old targets. Firmware: dfu uplaod target. * CI: submodules, add firmware build. * CI: proper submodule config. * refactor build system * CI: update chain to use new targets. Documentation: update to match current structure. * CI: clean before rebuild. * Add local test docker-compose exec dev make -C firmware TARGET=local TEST=1 run * Makefile: target specific build directory. CI: updated artifacts path. * Makefile: init git submodules if they don't exists. * Makefile: debug rule now doesn't reset MCU, prevent SIGINT propagation to st-util. * Makefile: proper rebuild sequence in zz and zzz * Makefile: timestamp tracking for flash and upload commands. * Apps: modular build. Input: fix flipper hal inline. * Wiki: proper bootloader link. * Applications: fix broken build for local targets. * add st-flash to docker * fix build * force rebuild app * move app force to firmware part * fix build deps * qrcode build ok * fix example display * add testing routine * update build instruction Co-authored-by: Aleksandr Kutuzov <aku@plooks.com> Co-authored-by: aanper <mail@s3f.ru>
279 lines
7.2 KiB
C
279 lines
7.2 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32l4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Ultimate Liberty license
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* SLA0044, the "License"; You may not use this file except in compliance with
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* the License. You may obtain a copy of the License at:
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* www.st.com/SLA0044
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32l4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern TIM_HandleTypeDef htim8;
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extern TIM_HandleTypeDef htim17;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32L4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32l4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles EXTI line0 interrupt.
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*/
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void EXTI0_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI0_IRQn 0 */
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/* USER CODE END EXTI0_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
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/* USER CODE BEGIN EXTI0_IRQn 1 */
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/* USER CODE END EXTI0_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line1 interrupt.
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*/
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void EXTI1_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI1_IRQn 0 */
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/* USER CODE END EXTI1_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
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/* USER CODE BEGIN EXTI1_IRQn 1 */
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/* USER CODE END EXTI1_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line2 interrupt.
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*/
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void EXTI2_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI2_IRQn 0 */
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/* USER CODE END EXTI2_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
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/* USER CODE BEGIN EXTI2_IRQn 1 */
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/* USER CODE END EXTI2_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line4 interrupt.
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*/
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void EXTI4_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI4_IRQn 0 */
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/* USER CODE END EXTI4_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
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/* USER CODE BEGIN EXTI4_IRQn 1 */
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/* USER CODE END EXTI4_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[9:5] interrupts.
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*/
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void EXTI9_5_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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/* USER CODE END EXTI9_5_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
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*/
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void TIM1_TRG_COM_TIM17_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
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HAL_TIM_IRQHandler(&htim17);
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
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}
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/**
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* @brief This function handles TIM8 capture compare interrupt.
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*/
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void TIM8_CC_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM8_CC_IRQn 0 */
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/* USER CODE END TIM8_CC_IRQn 0 */
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HAL_TIM_IRQHandler(&htim8);
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/* USER CODE BEGIN TIM8_CC_IRQn 1 */
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/* USER CODE END TIM8_CC_IRQn 1 */
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}
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/**
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* @brief This function handles USB OTG FS global interrupt.
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*/
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void OTG_FS_IRQHandler(void)
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{
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/* USER CODE BEGIN OTG_FS_IRQn 0 */
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/* USER CODE END OTG_FS_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
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/* USER CODE BEGIN OTG_FS_IRQn 1 */
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/* USER CODE END OTG_FS_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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