Commit graph

2 commits

Author SHA1 Message Date
あく
418c0939a0
Guard RCC registers access with critical section (#854)
* Core: critical section macros. FuriHal: guard rcc registers access with critical section, fix condition race.
* FuriHal: update documentation.

Co-authored-by: SG <who.just.the.doctor@gmail.com>
2021-12-01 01:07:17 +03:00
あく
cf591ef7eb
[FL-1911] FuriHal: i2c refactoring (#847)
* Project: fix release build, replace asserts with checks.
* FuriHal: i2c refactoring, new bus access model, flexible bus gpio configuration.
* FuriHal: set i2c pins to high on detach.
* FuriHal: more i2c bus events, put bus under reset when not used, move bus enable/disable routine to bus handler.
* FuriHal: fix i2c deadlock in power api, add external i2c handle.
2021-11-28 21:28:19 +03:00