mirror of
https://github.com/DarkFlippers/unleashed-firmware
synced 2024-11-23 04:53:08 +00:00
DIR_NAME and Drivers
This commit is contained in:
gid9798
parent
1c06ac1a82
commit
a191631c32
10 changed files with 1142 additions and 15 deletions
6
applications/drivers/application.fam
Normal file
6
applications/drivers/application.fam
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@ -0,0 +1,6 @@
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# Placeholder
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App(
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appid="drivers",
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name="Drivers device",
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apptype=FlipperAppType.METAPACKAGE,
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)
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7
applications/drivers/subghz/application.fam
Normal file
7
applications/drivers/subghz/application.fam
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@ -0,0 +1,7 @@
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App(
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appid="radio_device_cc1101_ext",
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apptype=FlipperAppType.PLUGIN,
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entry_point="subghz_device_cc1101_ext_ep",
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requires=["subghz"],
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fap_libs=["hwdrivers"],
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)
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802
applications/drivers/subghz/cc1101_ext/cc1101_ext.c
Normal file
802
applications/drivers/subghz/cc1101_ext/cc1101_ext.c
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@ -0,0 +1,802 @@
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#include "cc1101_ext.h"
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#include <lib/subghz/devices/cc1101_configs.h>
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#include <furi_hal_region.h>
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#include <furi_hal_version.h>
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#include <furi_hal_rtc.h>
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#include <furi_hal_spi.h>
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#include <furi_hal_interrupt.h>
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#include <furi_hal_resources.h>
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#include <furi_hal_bus.h>
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#include <stm32wbxx_ll_dma.h>
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#include <furi_hal_cortex.h>
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#include <furi.h>
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#include <cc1101.h>
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#include <stdio.h>
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#define TAG "SubGhz_Device_CC1101_Ext"
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#define SUBGHZ_DEVICE_CC1101_EXT_TX_GPIO &gpio_ext_pb2
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/* DMA Channels definition */
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA DMA2
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_CHANNEL LL_DMA_CHANNEL_3
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_CHANNEL LL_DMA_CHANNEL_4
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_CHANNEL LL_DMA_CHANNEL_5
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_IRQ FuriHalInterruptIdDma2Ch3
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF \
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SUBGHZ_DEVICE_CC1101_EXT_DMA, SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_CHANNEL
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF \
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SUBGHZ_DEVICE_CC1101_EXT_DMA, SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_CHANNEL
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#define SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF \
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SUBGHZ_DEVICE_CC1101_EXT_DMA, SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_CHANNEL
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/** Low level buffer dimensions and guard times */
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#define SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL (256)
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#define SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_HALF \
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(SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL / 2)
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#define SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_GUARD_TIME 999
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/** SubGhz state */
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typedef enum {
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SubGhzDeviceCC1101ExtStateInit, /**< Init pending */
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SubGhzDeviceCC1101ExtStateIdle, /**< Idle, energy save mode */
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SubGhzDeviceCC1101ExtStateAsyncRx, /**< Async RX started */
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SubGhzDeviceCC1101ExtStateAsyncTx, /**< Async TX started, DMA and timer is on */
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SubGhzDeviceCC1101ExtStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
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} SubGhzDeviceCC1101ExtState;
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/** SubGhz regulation, receive transmission on the current frequency for the
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* region */
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typedef enum {
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SubGhzDeviceCC1101ExtRegulationOnlyRx, /**only Rx*/
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SubGhzDeviceCC1101ExtRegulationTxRx, /**TxRx*/
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} SubGhzDeviceCC1101ExtRegulation;
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typedef struct {
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uint32_t* buffer;
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LevelDuration carry_ld;
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SubGhzDeviceCC1101ExtCallback callback;
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void* callback_context;
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uint32_t gpio_tx_buff[2];
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uint32_t debug_gpio_buff[2];
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} SubGhzDeviceCC1101ExtAsyncTx;
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typedef struct {
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uint32_t capture_delta_duration;
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SubGhzDeviceCC1101ExtCaptureCallback capture_callback;
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void* capture_callback_context;
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} SubGhzDeviceCC1101ExtAsyncRx;
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typedef struct {
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volatile SubGhzDeviceCC1101ExtState state;
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volatile SubGhzDeviceCC1101ExtRegulation regulation;
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volatile FuriHalSubGhzPreset preset;
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const GpioPin* async_mirror_pin;
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FuriHalSpiBusHandle* spi_bus_handle;
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const GpioPin* g0_pin;
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SubGhzDeviceCC1101ExtAsyncTx async_tx;
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SubGhzDeviceCC1101ExtAsyncRx async_rx;
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} SubGhzDeviceCC1101Ext;
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static SubGhzDeviceCC1101Ext* subghz_device_cc1101_ext = NULL;
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static bool subghz_device_cc1101_ext_check_init() {
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furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateInit);
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subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateIdle;
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subghz_device_cc1101_ext->preset = FuriHalSubGhzPresetIDLE;
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bool ret = false;
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(100 * 1000);
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do {
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// Reset
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furi_hal_gpio_init(
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subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
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cc1101_reset(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_write_reg(
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subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
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// Prepare GD0 for power on self test
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furi_hal_gpio_init(
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subghz_device_cc1101_ext->g0_pin, GpioModeInput, GpioPullNo, GpioSpeedLow);
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// GD0 low
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cc1101_write_reg(subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
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while(furi_hal_gpio_read(subghz_device_cc1101_ext->g0_pin) != false) {
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if(furi_hal_cortex_timer_is_expired(timer)) {
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//timeout
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break;
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}
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}
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if(furi_hal_cortex_timer_is_expired(timer)) {
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//timeout
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break;
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}
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// GD0 high
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cc1101_write_reg(
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subghz_device_cc1101_ext->spi_bus_handle,
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CC1101_IOCFG0,
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CC1101IocfgHW | CC1101_IOCFG_INV);
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while(furi_hal_gpio_read(subghz_device_cc1101_ext->g0_pin) != true) {
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if(furi_hal_cortex_timer_is_expired(timer)) {
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//timeout
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break;
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}
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}
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if(furi_hal_cortex_timer_is_expired(timer)) {
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//timeout
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break;
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}
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// Reset GD0 to floating state
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cc1101_write_reg(
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subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
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furi_hal_gpio_init(
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subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
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// RF switches
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furi_hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
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cc1101_write_reg(subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
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// Go to sleep
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cc1101_shutdown(subghz_device_cc1101_ext->spi_bus_handle);
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ret = true;
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} while(false);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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if(ret) {
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FURI_LOG_I(TAG, "Init OK");
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} else {
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FURI_LOG_E(TAG, "Init failed");
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}
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return ret;
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}
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bool subghz_device_cc1101_ext_alloc() {
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furi_assert(subghz_device_cc1101_ext == NULL);
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subghz_device_cc1101_ext = malloc(sizeof(SubGhzDeviceCC1101Ext));
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subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateInit;
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subghz_device_cc1101_ext->regulation = SubGhzDeviceCC1101ExtRegulationTxRx;
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subghz_device_cc1101_ext->preset = FuriHalSubGhzPresetIDLE;
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subghz_device_cc1101_ext->async_mirror_pin = NULL;
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subghz_device_cc1101_ext->spi_bus_handle = &furi_hal_spi_bus_handle_external;
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subghz_device_cc1101_ext->g0_pin = SUBGHZ_DEVICE_CC1101_EXT_TX_GPIO;
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subghz_device_cc1101_ext->async_rx.capture_delta_duration = 0;
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furi_hal_spi_bus_handle_init(subghz_device_cc1101_ext->spi_bus_handle);
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return subghz_device_cc1101_ext_check_init();
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}
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void subghz_device_cc1101_ext_free() {
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furi_assert(subghz_device_cc1101_ext != NULL);
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furi_hal_spi_bus_handle_deinit(subghz_device_cc1101_ext->spi_bus_handle);
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free(subghz_device_cc1101_ext);
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subghz_device_cc1101_ext = NULL;
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}
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void subghz_device_cc1101_ext_set_async_mirror_pin(const GpioPin* pin) {
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subghz_device_cc1101_ext->async_mirror_pin = pin;
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}
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const GpioPin* subghz_device_cc1101_ext_get_data_gpio() {
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return subghz_device_cc1101_ext->g0_pin;
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}
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bool subghz_device_cc1101_ext_is_connect() {
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bool ret = false;
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if(subghz_device_cc1101_ext == NULL) { // not initialized
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ret = subghz_device_cc1101_ext_alloc();
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subghz_device_cc1101_ext_free();
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} else { // initialized
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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uint8_t partnumber = cc1101_get_partnumber(subghz_device_cc1101_ext->spi_bus_handle);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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ret = (partnumber != 0) && (partnumber != 0xFF);
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}
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return ret;
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}
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void subghz_device_cc1101_ext_sleep() {
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furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateIdle);
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_switch_to_idle(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_write_reg(
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subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
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furi_hal_gpio_init(subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
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cc1101_shutdown(subghz_device_cc1101_ext->spi_bus_handle);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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subghz_device_cc1101_ext->preset = FuriHalSubGhzPresetIDLE;
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}
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void subghz_device_cc1101_ext_dump_state() {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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printf(
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"[subghz_device_cc1101_ext] cc1101 chip %d, version %d\r\n",
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cc1101_get_partnumber(subghz_device_cc1101_ext->spi_bus_handle),
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cc1101_get_version(subghz_device_cc1101_ext->spi_bus_handle));
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_load_preset(FuriHalSubGhzPreset preset) {
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if(preset == FuriHalSubGhzPresetOok650Async) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_ook_650khz_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_ook_async_patable);
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} else if(preset == FuriHalSubGhzPresetOok270Async) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_ook_270khz_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_ook_async_patable);
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} else if(preset == FuriHalSubGhzPreset2FSKDev238Async) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_2fsk_async_patable);
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} else if(preset == FuriHalSubGhzPreset2FSKDev476Async) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_2fsk_dev47_6khz_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_2fsk_async_patable);
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} else if(preset == FuriHalSubGhzPresetMSK99_97KbAsync) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_msk_99_97kb_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_msk_async_patable);
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} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
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subghz_device_cc1101_ext_load_registers(
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(uint8_t*)subghz_device_cc1101_preset_gfsk_9_99kb_async_regs);
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subghz_device_cc1101_ext_load_patable(subghz_device_cc1101_preset_gfsk_async_patable);
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} else {
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furi_crash("SubGhz: Missing config.");
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}
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subghz_device_cc1101_ext->preset = preset;
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}
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void subghz_device_cc1101_ext_load_custom_preset(uint8_t* preset_data) {
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//load config
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_reset(subghz_device_cc1101_ext->spi_bus_handle);
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uint32_t i = 0;
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uint8_t pa[8] = {0};
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while(preset_data[i]) {
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cc1101_write_reg(
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subghz_device_cc1101_ext->spi_bus_handle, preset_data[i], preset_data[i + 1]);
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i += 2;
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}
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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//load pa table
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memcpy(&pa[0], &preset_data[i + 2], 8);
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subghz_device_cc1101_ext_load_patable(pa);
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subghz_device_cc1101_ext->preset = FuriHalSubGhzPresetCustom;
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//show debug
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if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
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i = 0;
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FURI_LOG_D(TAG, "Loading custom preset");
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while(preset_data[i]) {
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FURI_LOG_D(TAG, "Reg[%lu]: %02X=%02X", i, preset_data[i], preset_data[i + 1]);
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i += 2;
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}
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for(uint8_t y = i; y < i + 10; y++) {
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FURI_LOG_D(TAG, "PA[%u]: %02X", y, preset_data[y]);
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}
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}
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}
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void subghz_device_cc1101_ext_load_registers(uint8_t* data) {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_reset(subghz_device_cc1101_ext->spi_bus_handle);
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uint32_t i = 0;
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while(data[i]) {
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cc1101_write_reg(subghz_device_cc1101_ext->spi_bus_handle, data[i], data[i + 1]);
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i += 2;
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}
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_load_patable(const uint8_t data[8]) {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_set_pa_table(subghz_device_cc1101_ext->spi_bus_handle, data);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_write_packet(const uint8_t* data, uint8_t size) {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_flush_tx(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_write_reg(subghz_device_cc1101_ext->spi_bus_handle, CC1101_FIFO, size);
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cc1101_write_fifo(subghz_device_cc1101_ext->spi_bus_handle, data, size);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_flush_rx() {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_flush_rx(subghz_device_cc1101_ext->spi_bus_handle);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_flush_tx() {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_flush_tx(subghz_device_cc1101_ext->spi_bus_handle);
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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bool subghz_device_cc1101_ext_rx_pipe_not_empty() {
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CC1101RxBytes status[1];
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_read_reg(
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subghz_device_cc1101_ext->spi_bus_handle,
|
||||
(CC1101_STATUS_RXBYTES) | CC1101_BURST,
|
||||
(uint8_t*)status);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
// TODO: you can add a buffer overflow flag if needed
|
||||
if(status->NUM_RXBYTES > 0) {
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
bool subghz_device_cc1101_ext_is_rx_data_crc_valid() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
uint8_t data[1];
|
||||
cc1101_read_reg(
|
||||
subghz_device_cc1101_ext->spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
if(((data[0] >> 7) & 0x01)) {
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_read_packet(uint8_t* data, uint8_t* size) {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_read_fifo(subghz_device_cc1101_ext->spi_bus_handle, data, size);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_shutdown() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
// Reset and shutdown
|
||||
cc1101_shutdown(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_reset() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_gpio_init(subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_switch_to_idle(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_reset(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_write_reg(
|
||||
subghz_device_cc1101_ext->spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_idle() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_switch_to_idle(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_rx() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_switch_to_rx(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
}
|
||||
|
||||
bool subghz_device_cc1101_ext_tx() {
|
||||
if(subghz_device_cc1101_ext->regulation != SubGhzDeviceCC1101ExtRegulationTxRx) return false;
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
cc1101_switch_to_tx(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
return true;
|
||||
}
|
||||
|
||||
float subghz_device_cc1101_ext_get_rssi() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
int32_t rssi_dec = cc1101_get_rssi(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
|
||||
float rssi = rssi_dec;
|
||||
if(rssi_dec >= 128) {
|
||||
rssi = ((rssi - 256.0f) / 2.0f) - 74.0f;
|
||||
} else {
|
||||
rssi = (rssi / 2.0f) - 74.0f;
|
||||
}
|
||||
|
||||
return rssi;
|
||||
}
|
||||
|
||||
uint8_t subghz_device_cc1101_ext_get_lqi() {
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
uint8_t data[1];
|
||||
cc1101_read_reg(
|
||||
subghz_device_cc1101_ext->spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
return data[0] & 0x7F;
|
||||
}
|
||||
|
||||
bool subghz_device_cc1101_ext_is_frequency_valid(uint32_t value) {
|
||||
if(!(value >= 299999755 && value <= 348000335) &&
|
||||
!(value >= 386999938 && value <= 464000000) &&
|
||||
!(value >= 778999847 && value <= 928000000)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t subghz_device_cc1101_ext_set_frequency(uint32_t value) {
|
||||
if(furi_hal_region_is_frequency_allowed(value)) {
|
||||
subghz_device_cc1101_ext->regulation = SubGhzDeviceCC1101ExtRegulationTxRx;
|
||||
} else {
|
||||
subghz_device_cc1101_ext->regulation = SubGhzDeviceCC1101ExtRegulationOnlyRx;
|
||||
}
|
||||
|
||||
furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
uint32_t real_frequency =
|
||||
cc1101_set_frequency(subghz_device_cc1101_ext->spi_bus_handle, value);
|
||||
cc1101_calibrate(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
|
||||
while(true) {
|
||||
CC1101Status status = cc1101_get_status(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
if(status.STATE == CC1101StateIDLE) break;
|
||||
}
|
||||
|
||||
furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
|
||||
return real_frequency;
|
||||
}
|
||||
|
||||
static bool subghz_device_cc1101_ext_start_debug() {
|
||||
bool ret = false;
|
||||
if(subghz_device_cc1101_ext->async_mirror_pin != NULL) {
|
||||
furi_hal_gpio_init(
|
||||
subghz_device_cc1101_ext->async_mirror_pin,
|
||||
GpioModeOutputPushPull,
|
||||
GpioPullNo,
|
||||
GpioSpeedVeryHigh);
|
||||
ret = true;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool subghz_device_cc1101_ext_stop_debug() {
|
||||
bool ret = false;
|
||||
if(subghz_device_cc1101_ext->async_mirror_pin != NULL) {
|
||||
furi_hal_gpio_init(
|
||||
subghz_device_cc1101_ext->async_mirror_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
ret = true;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_capture_ISR() {
|
||||
if(!furi_hal_gpio_read(subghz_device_cc1101_ext->g0_pin)) {
|
||||
if(subghz_device_cc1101_ext->async_rx.capture_callback) {
|
||||
if(subghz_device_cc1101_ext->async_mirror_pin != NULL)
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->async_mirror_pin, false);
|
||||
|
||||
subghz_device_cc1101_ext->async_rx.capture_callback(
|
||||
true,
|
||||
LL_TIM_GetCounter(TIM17),
|
||||
(void*)subghz_device_cc1101_ext->async_rx.capture_callback_context);
|
||||
}
|
||||
} else {
|
||||
if(subghz_device_cc1101_ext->async_rx.capture_callback) {
|
||||
if(subghz_device_cc1101_ext->async_mirror_pin != NULL)
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->async_mirror_pin, true);
|
||||
|
||||
subghz_device_cc1101_ext->async_rx.capture_callback(
|
||||
false,
|
||||
LL_TIM_GetCounter(TIM17),
|
||||
(void*)subghz_device_cc1101_ext->async_rx.capture_callback_context);
|
||||
}
|
||||
}
|
||||
LL_TIM_SetCounter(TIM17, 6);
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_start_async_rx(
|
||||
SubGhzDeviceCC1101ExtCaptureCallback callback,
|
||||
void* context) {
|
||||
furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateIdle);
|
||||
subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateAsyncRx;
|
||||
|
||||
subghz_device_cc1101_ext->async_rx.capture_callback = callback;
|
||||
subghz_device_cc1101_ext->async_rx.capture_callback_context = context;
|
||||
|
||||
furi_hal_bus_enable(FuriHalBusTIM17);
|
||||
|
||||
// Configure TIM
|
||||
LL_TIM_SetPrescaler(TIM17, 64 - 1);
|
||||
LL_TIM_SetCounterMode(TIM17, LL_TIM_COUNTERMODE_UP);
|
||||
LL_TIM_SetAutoReload(TIM17, 0xFFFF);
|
||||
LL_TIM_SetClockDivision(TIM17, LL_TIM_CLOCKDIVISION_DIV1);
|
||||
|
||||
// Timer: advanced
|
||||
LL_TIM_SetClockSource(TIM17, LL_TIM_CLOCKSOURCE_INTERNAL);
|
||||
LL_TIM_DisableARRPreload(TIM17);
|
||||
LL_TIM_DisableDMAReq_TRIG(TIM17);
|
||||
LL_TIM_DisableIT_TRIG(TIM17);
|
||||
|
||||
furi_hal_gpio_init(
|
||||
subghz_device_cc1101_ext->g0_pin, GpioModeInterruptRiseFall, GpioPullUp, GpioSpeedVeryHigh);
|
||||
furi_hal_gpio_remove_int_callback(subghz_device_cc1101_ext->g0_pin);
|
||||
furi_hal_gpio_add_int_callback(
|
||||
subghz_device_cc1101_ext->g0_pin,
|
||||
subghz_device_cc1101_ext_capture_ISR,
|
||||
subghz_device_cc1101_ext->async_rx.capture_callback);
|
||||
|
||||
// Start timer
|
||||
LL_TIM_SetCounter(TIM17, 0);
|
||||
LL_TIM_EnableCounter(TIM17);
|
||||
|
||||
// Start debug
|
||||
subghz_device_cc1101_ext_start_debug();
|
||||
|
||||
// Switch to RX
|
||||
subghz_device_cc1101_ext_rx();
|
||||
|
||||
//Clear the variable after the end of the session
|
||||
subghz_device_cc1101_ext->async_rx.capture_delta_duration = 0;
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_stop_async_rx() {
|
||||
furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncRx);
|
||||
subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateIdle;
|
||||
|
||||
// Shutdown radio
|
||||
subghz_device_cc1101_ext_idle();
|
||||
|
||||
FURI_CRITICAL_ENTER();
|
||||
furi_hal_bus_disable(FuriHalBusTIM17);
|
||||
|
||||
// Stop debug
|
||||
subghz_device_cc1101_ext_stop_debug();
|
||||
|
||||
FURI_CRITICAL_EXIT();
|
||||
furi_hal_gpio_remove_int_callback(subghz_device_cc1101_ext->g0_pin);
|
||||
furi_hal_gpio_init(subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_async_tx_refill(uint32_t* buffer, size_t samples) {
|
||||
furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx);
|
||||
while(samples > 0) {
|
||||
bool is_odd = samples % 2;
|
||||
LevelDuration ld;
|
||||
if(level_duration_is_reset(subghz_device_cc1101_ext->async_tx.carry_ld)) {
|
||||
ld = subghz_device_cc1101_ext->async_tx.callback(
|
||||
subghz_device_cc1101_ext->async_tx.callback_context);
|
||||
} else {
|
||||
ld = subghz_device_cc1101_ext->async_tx.carry_ld;
|
||||
subghz_device_cc1101_ext->async_tx.carry_ld = level_duration_reset();
|
||||
}
|
||||
|
||||
if(level_duration_is_wait(ld)) {
|
||||
*buffer = SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_GUARD_TIME;
|
||||
buffer++;
|
||||
samples--;
|
||||
} else if(level_duration_is_reset(ld)) {
|
||||
*buffer = 0;
|
||||
buffer++;
|
||||
samples--;
|
||||
LL_DMA_DisableIT_HT(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
LL_DMA_DisableIT_TC(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
LL_TIM_EnableIT_UPDATE(TIM17);
|
||||
break;
|
||||
} else {
|
||||
bool level = level_duration_get_level(ld);
|
||||
|
||||
// Inject guard time if level is incorrect
|
||||
if(is_odd != level) {
|
||||
*buffer = SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_GUARD_TIME;
|
||||
buffer++;
|
||||
samples--;
|
||||
|
||||
// Special case: prevent buffer overflow if sample is last
|
||||
if(samples == 0) {
|
||||
subghz_device_cc1101_ext->async_tx.carry_ld = ld;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t duration = level_duration_get_duration(ld);
|
||||
furi_assert(duration > 0);
|
||||
*buffer = duration - 1;
|
||||
buffer++;
|
||||
samples--;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_async_tx_dma_isr() {
|
||||
furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx);
|
||||
|
||||
#if SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_CHANNEL == LL_DMA_CHANNEL_3
|
||||
if(LL_DMA_IsActiveFlag_HT3(SUBGHZ_DEVICE_CC1101_EXT_DMA)) {
|
||||
LL_DMA_ClearFlag_HT3(SUBGHZ_DEVICE_CC1101_EXT_DMA);
|
||||
subghz_device_cc1101_ext_async_tx_refill(
|
||||
subghz_device_cc1101_ext->async_tx.buffer,
|
||||
SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_HALF);
|
||||
}
|
||||
if(LL_DMA_IsActiveFlag_TC3(SUBGHZ_DEVICE_CC1101_EXT_DMA)) {
|
||||
LL_DMA_ClearFlag_TC3(SUBGHZ_DEVICE_CC1101_EXT_DMA);
|
||||
subghz_device_cc1101_ext_async_tx_refill(
|
||||
subghz_device_cc1101_ext->async_tx.buffer +
|
||||
SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_HALF,
|
||||
SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_HALF);
|
||||
}
|
||||
#else
|
||||
#error Update this code. Would you kindly?
|
||||
#endif
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_async_tx_timer_isr() {
|
||||
if(LL_TIM_IsActiveFlag_UPDATE(TIM17)) {
|
||||
if(LL_TIM_GetAutoReload(TIM17) == 0) {
|
||||
LL_DMA_DisableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
|
||||
if(subghz_device_cc1101_ext->async_mirror_pin != NULL)
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->async_mirror_pin, false);
|
||||
LL_TIM_DisableCounter(TIM17);
|
||||
subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateAsyncTxEnd;
|
||||
}
|
||||
LL_TIM_ClearFlag_UPDATE(TIM17);
|
||||
}
|
||||
}
|
||||
|
||||
bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callback, void* context) {
|
||||
furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateIdle);
|
||||
furi_assert(callback);
|
||||
|
||||
//If transmission is prohibited by regional settings
|
||||
if(subghz_device_cc1101_ext->regulation != SubGhzDeviceCC1101ExtRegulationTxRx) return false;
|
||||
|
||||
subghz_device_cc1101_ext->async_tx.callback = callback;
|
||||
subghz_device_cc1101_ext->async_tx.callback_context = context;
|
||||
|
||||
subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateAsyncTx;
|
||||
|
||||
subghz_device_cc1101_ext->async_tx.buffer =
|
||||
malloc(SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL * sizeof(uint32_t));
|
||||
|
||||
//Signal generation with mem-to-mem DMA
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
|
||||
furi_hal_gpio_init(
|
||||
subghz_device_cc1101_ext->g0_pin, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
|
||||
|
||||
// Configure DMA update timer
|
||||
LL_DMA_SetMemoryAddress(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t)subghz_device_cc1101_ext->async_tx.buffer);
|
||||
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t) & (TIM17->ARR));
|
||||
LL_DMA_ConfigTransfer(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF,
|
||||
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
|
||||
LL_DMA_MEMORY_INCREMENT | LL_DMA_PDATAALIGN_WORD | LL_DMA_MDATAALIGN_WORD |
|
||||
LL_DMA_MODE_NORMAL);
|
||||
LL_DMA_SetDataLength(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL);
|
||||
LL_DMA_SetPeriphRequest(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, LL_DMAMUX_REQ_TIM17_UP);
|
||||
|
||||
LL_DMA_EnableIT_TC(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
LL_DMA_EnableIT_HT(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
LL_DMA_EnableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
|
||||
furi_hal_interrupt_set_isr(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_IRQ, subghz_device_cc1101_ext_async_tx_dma_isr, NULL);
|
||||
|
||||
furi_hal_bus_enable(FuriHalBusTIM17);
|
||||
|
||||
// Configure TIM
|
||||
LL_TIM_SetPrescaler(TIM17, 64 - 1);
|
||||
LL_TIM_SetCounterMode(TIM17, LL_TIM_COUNTERMODE_UP);
|
||||
LL_TIM_SetAutoReload(TIM17, 0xFFFF);
|
||||
LL_TIM_SetClockDivision(TIM17, LL_TIM_CLOCKDIVISION_DIV1);
|
||||
LL_TIM_SetClockSource(TIM17, LL_TIM_CLOCKSOURCE_INTERNAL);
|
||||
LL_TIM_DisableARRPreload(TIM17);
|
||||
|
||||
furi_hal_interrupt_set_isr(
|
||||
FuriHalInterruptIdTim1TrgComTim17, subghz_device_cc1101_ext_async_tx_timer_isr, NULL);
|
||||
|
||||
subghz_device_cc1101_ext_async_tx_refill(
|
||||
subghz_device_cc1101_ext->async_tx.buffer, SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL);
|
||||
|
||||
// Configure tx gpio dma
|
||||
const GpioPin* gpio = subghz_device_cc1101_ext->g0_pin;
|
||||
|
||||
subghz_device_cc1101_ext->async_tx.gpio_tx_buff[0] = (uint32_t)gpio->pin << GPIO_NUMBER;
|
||||
subghz_device_cc1101_ext->async_tx.gpio_tx_buff[1] = gpio->pin;
|
||||
|
||||
LL_DMA_SetMemoryAddress(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
|
||||
(uint32_t)subghz_device_cc1101_ext->async_tx.gpio_tx_buff);
|
||||
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, (uint32_t) & (gpio->port->BSRR));
|
||||
LL_DMA_ConfigTransfer(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
|
||||
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
|
||||
LL_DMA_MEMORY_INCREMENT | LL_DMA_PDATAALIGN_WORD | LL_DMA_MDATAALIGN_WORD |
|
||||
LL_DMA_PRIORITY_HIGH);
|
||||
LL_DMA_SetDataLength(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, 2);
|
||||
LL_DMA_SetPeriphRequest(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, LL_DMAMUX_REQ_TIM17_UP);
|
||||
LL_DMA_EnableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF);
|
||||
|
||||
// Start debug
|
||||
if(subghz_device_cc1101_ext_start_debug()) {
|
||||
gpio = subghz_device_cc1101_ext->async_mirror_pin;
|
||||
subghz_device_cc1101_ext->async_tx.debug_gpio_buff[0] = (uint32_t)gpio->pin << GPIO_NUMBER;
|
||||
subghz_device_cc1101_ext->async_tx.debug_gpio_buff[1] = gpio->pin;
|
||||
|
||||
LL_DMA_SetMemoryAddress(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
|
||||
(uint32_t)subghz_device_cc1101_ext->async_tx.debug_gpio_buff);
|
||||
LL_DMA_SetPeriphAddress(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, (uint32_t) & (gpio->port->BSRR));
|
||||
LL_DMA_ConfigTransfer(
|
||||
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
|
||||
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
|
||||
LL_DMA_MEMORY_INCREMENT | LL_DMA_PDATAALIGN_WORD | LL_DMA_MDATAALIGN_WORD |
|
||||
LL_DMA_PRIORITY_LOW);
|
||||
LL_DMA_SetDataLength(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, 2);
|
||||
LL_DMA_SetPeriphRequest(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, LL_DMAMUX_REQ_TIM17_UP);
|
||||
LL_DMA_EnableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF);
|
||||
}
|
||||
|
||||
// Start counter
|
||||
LL_TIM_EnableDMAReq_UPDATE(TIM17);
|
||||
LL_TIM_GenerateEvent_UPDATE(TIM17);
|
||||
|
||||
subghz_device_cc1101_ext_tx();
|
||||
|
||||
LL_TIM_SetCounter(TIM17, 0);
|
||||
LL_TIM_EnableCounter(TIM17);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool subghz_device_cc1101_ext_is_async_tx_complete() {
|
||||
return subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTxEnd;
|
||||
}
|
||||
|
||||
void subghz_device_cc1101_ext_stop_async_tx() {
|
||||
furi_assert(
|
||||
subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx ||
|
||||
subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTxEnd);
|
||||
|
||||
// Shutdown radio
|
||||
subghz_device_cc1101_ext_idle();
|
||||
|
||||
// Deinitialize Timer
|
||||
FURI_CRITICAL_ENTER();
|
||||
furi_hal_bus_disable(FuriHalBusTIM17);
|
||||
furi_hal_interrupt_set_isr(FuriHalInterruptIdTim1TrgComTim17, NULL, NULL);
|
||||
|
||||
// Deinitialize DMA
|
||||
LL_DMA_DeInit(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
|
||||
LL_DMA_DisableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF);
|
||||
furi_hal_interrupt_set_isr(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_IRQ, NULL, NULL);
|
||||
|
||||
// Deinitialize GPIO
|
||||
furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
|
||||
furi_hal_gpio_init(subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
// Stop debug
|
||||
if(subghz_device_cc1101_ext_stop_debug()) {
|
||||
LL_DMA_DisableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF);
|
||||
}
|
||||
|
||||
FURI_CRITICAL_EXIT();
|
||||
|
||||
free(subghz_device_cc1101_ext->async_tx.buffer);
|
||||
|
||||
subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateIdle;
|
||||
}
|
||||
212
applications/drivers/subghz/cc1101_ext/cc1101_ext.h
Normal file
212
applications/drivers/subghz/cc1101_ext/cc1101_ext.h
Normal file
|
|
@ -0,0 +1,212 @@
|
|||
/**
|
||||
* @file furi_hal_subghz.h
|
||||
* SubGhz HAL API
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#include <lib/subghz/devices/preset.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <toolbox/level_duration.h>
|
||||
#include <furi_hal_gpio.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Mirror RX/TX async modulation signal to specified pin
|
||||
*
|
||||
* @warning Configures pin to output mode. Make sure it is not connected
|
||||
* directly to power or ground.
|
||||
*
|
||||
* @param[in] pin pointer to the gpio pin structure or NULL to disable
|
||||
*/
|
||||
void subghz_device_cc1101_ext_set_async_mirror_pin(const GpioPin* pin);
|
||||
|
||||
/** Get data GPIO
|
||||
*
|
||||
* @return pointer to the gpio pin structure
|
||||
*/
|
||||
const GpioPin* subghz_device_cc1101_ext_get_data_gpio();
|
||||
|
||||
/** Initialize device
|
||||
*
|
||||
* @return true if success
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_alloc();
|
||||
|
||||
/** Deinitialize device
|
||||
*/
|
||||
void subghz_device_cc1101_ext_free();
|
||||
|
||||
/** Check and switch to power save mode Used by internal API-HAL
|
||||
* initialization routine Can be used to reinitialize device to safe state and
|
||||
* send it to sleep
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_is_connect();
|
||||
|
||||
/** Send device to sleep mode
|
||||
*/
|
||||
void subghz_device_cc1101_ext_sleep();
|
||||
|
||||
/** Dump info to stdout
|
||||
*/
|
||||
void subghz_device_cc1101_ext_dump_state();
|
||||
|
||||
/** Load registers from preset by preset name
|
||||
*
|
||||
* @param preset to load
|
||||
*/
|
||||
void subghz_device_cc1101_ext_load_preset(FuriHalSubGhzPreset preset);
|
||||
|
||||
/** Load custom registers from preset
|
||||
*
|
||||
* @param preset_data registers to load
|
||||
*/
|
||||
void subghz_device_cc1101_ext_load_custom_preset(uint8_t* preset_data);
|
||||
|
||||
/** Load registers
|
||||
*
|
||||
* @param data Registers data
|
||||
*/
|
||||
void subghz_device_cc1101_ext_load_registers(uint8_t* data);
|
||||
|
||||
/** Load PATABLE
|
||||
*
|
||||
* @param data 8 uint8_t values
|
||||
*/
|
||||
void subghz_device_cc1101_ext_load_patable(const uint8_t data[8]);
|
||||
|
||||
/** Write packet to FIFO
|
||||
*
|
||||
* @param data bytes array
|
||||
* @param size size
|
||||
*/
|
||||
void subghz_device_cc1101_ext_write_packet(const uint8_t* data, uint8_t size);
|
||||
|
||||
/** Check if receive pipe is not empty
|
||||
*
|
||||
* @return true if not empty
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_rx_pipe_not_empty();
|
||||
|
||||
/** Check if received data crc is valid
|
||||
*
|
||||
* @return true if valid
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_is_rx_data_crc_valid();
|
||||
|
||||
/** Read packet from FIFO
|
||||
*
|
||||
* @param data pointer
|
||||
* @param size size
|
||||
*/
|
||||
void subghz_device_cc1101_ext_read_packet(uint8_t* data, uint8_t* size);
|
||||
|
||||
/** Flush rx FIFO buffer
|
||||
*/
|
||||
void subghz_device_cc1101_ext_flush_rx();
|
||||
|
||||
/** Flush tx FIFO buffer
|
||||
*/
|
||||
void subghz_device_cc1101_ext_flush_tx();
|
||||
|
||||
/** Shutdown Issue SPWD command
|
||||
* @warning registers content will be lost
|
||||
*/
|
||||
void subghz_device_cc1101_ext_shutdown();
|
||||
|
||||
/** Reset Issue reset command
|
||||
* @warning registers content will be lost
|
||||
*/
|
||||
void subghz_device_cc1101_ext_reset();
|
||||
|
||||
/** Switch to Idle
|
||||
*/
|
||||
void subghz_device_cc1101_ext_idle();
|
||||
|
||||
/** Switch to Receive
|
||||
*/
|
||||
void subghz_device_cc1101_ext_rx();
|
||||
|
||||
/** Switch to Transmit
|
||||
*
|
||||
* @return true if the transfer is allowed by belonging to the region
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_tx();
|
||||
|
||||
/** Get RSSI value in dBm
|
||||
*
|
||||
* @return RSSI value
|
||||
*/
|
||||
float subghz_device_cc1101_ext_get_rssi();
|
||||
|
||||
/** Get LQI
|
||||
*
|
||||
* @return LQI value
|
||||
*/
|
||||
uint8_t subghz_device_cc1101_ext_get_lqi();
|
||||
|
||||
/** Check if frequency is in valid range
|
||||
*
|
||||
* @param value frequency in Hz
|
||||
*
|
||||
* @return true if frequency is valid, otherwise false
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_is_frequency_valid(uint32_t value);
|
||||
|
||||
/** Set frequency
|
||||
*
|
||||
* @param value frequency in Hz
|
||||
*
|
||||
* @return real frequency in Hz
|
||||
*/
|
||||
uint32_t subghz_device_cc1101_ext_set_frequency(uint32_t value);
|
||||
|
||||
/* High Level API */
|
||||
|
||||
/** Signal Timings Capture callback */
|
||||
typedef void (*SubGhzDeviceCC1101ExtCaptureCallback)(bool level, uint32_t duration, void* context);
|
||||
|
||||
/** Enable signal timings capture Initializes GPIO and TIM2 for timings capture
|
||||
*
|
||||
* @param callback SubGhzDeviceCC1101ExtCaptureCallback
|
||||
* @param context callback context
|
||||
*/
|
||||
void subghz_device_cc1101_ext_start_async_rx(
|
||||
SubGhzDeviceCC1101ExtCaptureCallback callback,
|
||||
void* context);
|
||||
|
||||
/** Disable signal timings capture Resets GPIO and TIM2
|
||||
*/
|
||||
void subghz_device_cc1101_ext_stop_async_rx();
|
||||
|
||||
/** Async TX callback type
|
||||
* @param context callback context
|
||||
* @return LevelDuration
|
||||
*/
|
||||
typedef LevelDuration (*SubGhzDeviceCC1101ExtCallback)(void* context);
|
||||
|
||||
/** Start async TX Initializes GPIO, TIM2 and DMA1 for signal output
|
||||
*
|
||||
* @param callback SubGhzDeviceCC1101ExtCallback
|
||||
* @param context callback context
|
||||
*
|
||||
* @return true if the transfer is allowed by belonging to the region
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callback, void* context);
|
||||
|
||||
/** Wait for async transmission to complete
|
||||
*
|
||||
* @return true if TX complete
|
||||
*/
|
||||
bool subghz_device_cc1101_ext_is_async_tx_complete();
|
||||
|
||||
/** Stop async transmission and cleanup resources Resets GPIO, TIM2, and DMA1
|
||||
*/
|
||||
void subghz_device_cc1101_ext_stop_async_tx();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
#include "cc1101_ext_interconnect.h"
|
||||
#include "cc1101_ext.h"
|
||||
|
||||
#define TAG "SubGhzDeviceCC1101Ext"
|
||||
|
||||
static bool subghz_device_cc1101_ext_interconnect_is_frequency_valid(uint32_t frequency) {
|
||||
bool ret = subghz_device_cc1101_ext_is_frequency_valid(frequency);
|
||||
if(!ret) {
|
||||
furi_crash("SubGhz: Incorrect frequency.");
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32_t subghz_device_cc1101_ext_interconnect_set_frequency(uint32_t frequency) {
|
||||
subghz_device_cc1101_ext_interconnect_is_frequency_valid(frequency);
|
||||
return subghz_device_cc1101_ext_set_frequency(frequency);
|
||||
}
|
||||
|
||||
static bool subghz_device_cc1101_ext_interconnect_start_async_tx(void* callback, void* context) {
|
||||
return subghz_device_cc1101_ext_start_async_tx(
|
||||
(SubGhzDeviceCC1101ExtCallback)callback, context);
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_interconnect_start_async_rx(void* callback, void* context) {
|
||||
subghz_device_cc1101_ext_start_async_rx(
|
||||
(SubGhzDeviceCC1101ExtCaptureCallback)callback, context);
|
||||
}
|
||||
|
||||
static void subghz_device_cc1101_ext_interconnect_load_preset(
|
||||
FuriHalSubGhzPreset preset,
|
||||
uint8_t* preset_data) {
|
||||
if(preset != FuriHalSubGhzPresetCustom) {
|
||||
subghz_device_cc1101_ext_load_preset(preset);
|
||||
} else {
|
||||
subghz_device_cc1101_ext_load_custom_preset(preset_data);
|
||||
}
|
||||
}
|
||||
|
||||
const SubGhzDeviceInterconnect subghz_device_cc1101_ext_interconnect = {
|
||||
.begin = subghz_device_cc1101_ext_alloc,
|
||||
.end = subghz_device_cc1101_ext_free,
|
||||
.is_connect = subghz_device_cc1101_ext_is_connect,
|
||||
.reset = subghz_device_cc1101_ext_reset,
|
||||
.sleep = subghz_device_cc1101_ext_sleep,
|
||||
.idle = subghz_device_cc1101_ext_idle,
|
||||
.load_preset = subghz_device_cc1101_ext_interconnect_load_preset,
|
||||
.set_frequency = subghz_device_cc1101_ext_interconnect_set_frequency,
|
||||
.is_frequency_valid = subghz_device_cc1101_ext_is_frequency_valid,
|
||||
.set_async_mirror_pin = subghz_device_cc1101_ext_set_async_mirror_pin,
|
||||
.get_data_gpio = subghz_device_cc1101_ext_get_data_gpio,
|
||||
|
||||
.set_tx = subghz_device_cc1101_ext_tx,
|
||||
.flush_tx = subghz_device_cc1101_ext_flush_tx,
|
||||
.start_async_tx = subghz_device_cc1101_ext_interconnect_start_async_tx,
|
||||
.is_async_complete_tx = subghz_device_cc1101_ext_is_async_tx_complete,
|
||||
.stop_async_tx = subghz_device_cc1101_ext_stop_async_tx,
|
||||
|
||||
.set_rx = subghz_device_cc1101_ext_rx,
|
||||
.flush_rx = subghz_device_cc1101_ext_flush_rx,
|
||||
.start_async_rx = subghz_device_cc1101_ext_interconnect_start_async_rx,
|
||||
.stop_async_rx = subghz_device_cc1101_ext_stop_async_rx,
|
||||
|
||||
.get_rssi = subghz_device_cc1101_ext_get_rssi,
|
||||
.get_lqi = subghz_device_cc1101_ext_get_lqi,
|
||||
|
||||
.rx_pipe_not_empty = subghz_device_cc1101_ext_rx_pipe_not_empty,
|
||||
.is_rx_data_crc_valid = subghz_device_cc1101_ext_is_rx_data_crc_valid,
|
||||
.read_packet = subghz_device_cc1101_ext_read_packet,
|
||||
.write_packet = subghz_device_cc1101_ext_write_packet,
|
||||
};
|
||||
|
||||
const SubGhzDevice subghz_device_cc1101_ext = {
|
||||
.name = SUBGHZ_DEVICE_CC1101_EXT_NAME,
|
||||
.interconnect = &subghz_device_cc1101_ext_interconnect,
|
||||
};
|
||||
|
||||
static const FlipperAppPluginDescriptor subghz_device_cc1101_ext_descriptor = {
|
||||
.appid = SUBGHZ_RADIO_DEVICE_PLUGIN_APP_ID,
|
||||
.ep_api_version = SUBGHZ_RADIO_DEVICE_PLUGIN_API_VERSION,
|
||||
.entry_point = &subghz_device_cc1101_ext,
|
||||
};
|
||||
|
||||
const FlipperAppPluginDescriptor* subghz_device_cc1101_ext_ep() {
|
||||
return &subghz_device_cc1101_ext_descriptor;
|
||||
}
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
#pragma once
|
||||
#include <lib/subghz/devices/types.h>
|
||||
|
||||
#define SUBGHZ_DEVICE_CC1101_EXT_NAME "cc1101_ext"
|
||||
|
||||
typedef struct SubGhzDeviceCC1101Ext SubGhzDeviceCC1101Ext;
|
||||
|
||||
const FlipperAppPluginDescriptor* subghz_device_cc1101_ext_ep();
|
||||
|
|
@ -24,16 +24,15 @@ SubGhzTxRx* subghz_txrx_alloc() {
|
|||
instance->fff_data = flipper_format_string_alloc();
|
||||
|
||||
instance->environment = subghz_environment_alloc();
|
||||
instance->is_database_loaded = subghz_environment_load_keystore(
|
||||
instance->environment, EXT_PATH("subghz/assets/keeloq_mfcodes"));
|
||||
subghz_environment_load_keystore(
|
||||
instance->environment, EXT_PATH("subghz/assets/keeloq_mfcodes_user"));
|
||||
instance->is_database_loaded =
|
||||
subghz_environment_load_keystore(instance->environment, SUBGHZ_KEYSTORE_DIR_NAME);
|
||||
subghz_environment_load_keystore(instance->environment, SUBGHZ_KEYSTORE_DIR_USER_NAME);
|
||||
subghz_environment_set_came_atomo_rainbow_table_file_name(
|
||||
instance->environment, EXT_PATH("subghz/assets/came_atomo"));
|
||||
instance->environment, SUBGHZ_CAME_ATOMO_DIR_NAME);
|
||||
subghz_environment_set_alutech_at_4n_rainbow_table_file_name(
|
||||
instance->environment, EXT_PATH("subghz/assets/alutech_at_4n"));
|
||||
instance->environment, SUBGHZ_ALUTECH_AT_4N_DIR_NAME);
|
||||
subghz_environment_set_nice_flor_s_rainbow_table_file_name(
|
||||
instance->environment, EXT_PATH("subghz/assets/nice_flor_s"));
|
||||
instance->environment, SUBGHZ_NICE_FLOR_S_DIR_NAME);
|
||||
subghz_environment_set_protocol_registry(
|
||||
instance->environment, (void*)&subghz_protocol_registry);
|
||||
instance->receiver = subghz_receiver_alloc_init(instance->environment);
|
||||
|
|
@ -56,6 +55,7 @@ void subghz_txrx_free(SubGhzTxRx* instance) {
|
|||
flipper_format_free(instance->fff_data);
|
||||
furi_string_free(instance->preset->name);
|
||||
subghz_setting_free(instance->setting);
|
||||
|
||||
free(instance->preset);
|
||||
free(instance);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -78,9 +78,9 @@ The system will take over any given peripheral only when the respective feature
|
|||
| ADC | | |
|
||||
| QUADSPI | | |
|
||||
| TIM1 | yes | subghz, lfrfid, nfc, infrared, etc... |
|
||||
| TIM2 | yes | -- |
|
||||
| TIM2 | yes | subghz, infrared, etc... |
|
||||
| TIM16 | yes | speaker |
|
||||
| TIM17 | | |
|
||||
| TIM17 | yes | cc1101_ext |
|
||||
| LPTIM1 | yes | tickless idle timer |
|
||||
| LPTIM2 | yes | pwm |
|
||||
| SAI1 | | |
|
||||
|
|
@ -104,10 +104,10 @@ Below is the list of DMA channels and their usage by the system.
|
|||
| -- | 5 | | |
|
||||
| -- | 6 | | |
|
||||
| -- | 7 | | |
|
||||
| DMA2 | 1 | yes | infrared, lfrfid, subghz |
|
||||
| DMA2 | 1 | yes | infrared, lfrfid, subghz, |
|
||||
| -- | 2 | yes | -- |
|
||||
| -- | 3 | yes | SPI |
|
||||
| -- | 4 | yes | SPI |
|
||||
| -- | 5 | | |
|
||||
| -- | 6 | | |
|
||||
| -- | 7 | | |
|
||||
| -- | 3 | yes | cc1101_ext |
|
||||
| -- | 4 | yes | cc1101_ext |
|
||||
| -- | 5 | yes | cc1101_ext |
|
||||
| -- | 6 | yes | SPI |
|
||||
| -- | 7 | yes | SPI |
|
||||
|
|
|
|||
|
|
@ -21,6 +21,12 @@
|
|||
#define SUBGHZ_RAW_FILE_VERSION 1
|
||||
#define SUBGHZ_RAW_FILE_TYPE "Flipper SubGhz RAW File"
|
||||
|
||||
#define SUBGHZ_KEYSTORE_DIR_NAME EXT_PATH("subghz/assets/keeloq_mfcodes")
|
||||
#define SUBGHZ_KEYSTORE_DIR_USER_NAME EXT_PATH("subghz/assets/keeloq_mfcodes_user")
|
||||
#define SUBGHZ_CAME_ATOMO_DIR_NAME EXT_PATH("subghz/assets/came_atomo")
|
||||
#define SUBGHZ_NICE_FLOR_S_DIR_NAME EXT_PATH("subghz/assets/nice_flor_s")
|
||||
#define SUBGHZ_ALUTECH_AT_4N_DIR_NAME EXT_PATH("subghz/assets/alutech_at_4n")
|
||||
|
||||
typedef struct SubGhzProtocolRegistry SubGhzProtocolRegistry;
|
||||
typedef struct SubGhzEnvironment SubGhzEnvironment;
|
||||
|
||||
|
|
|
|||
|
|
@ -233,6 +233,7 @@ vars.AddVariables(
|
|||
("applications/debug", False),
|
||||
("applications/external", False),
|
||||
("applications/examples", False),
|
||||
("applications/drivers", False),
|
||||
("applications_user", False),
|
||||
],
|
||||
),
|
||||
|
|
|
|||
Loading…
Reference in a new issue