mirror of
https://github.com/DarkFlippers/unleashed-firmware
synced 2024-11-26 22:40:25 +00:00
SubGhz: fix transmission frequency (#922)
This commit is contained in:
parent
3a86da5526
commit
9b62b557b4
4 changed files with 2 additions and 122 deletions
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@ -15,7 +15,7 @@ void subghz_scene_more_raw_on_enter(void* context) {
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submenu_add_item(
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subghz->submenu,
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"Edit name",
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"Rename",
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SubmenuIndexEdit,
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subghz_scene_more_raw_submenu_callback,
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subghz);
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@ -22,7 +22,7 @@ void subghz_scene_saved_menu_on_enter(void* context) {
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submenu_add_item(
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subghz->submenu,
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"Edit name",
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"Rename",
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SubmenuIndexEdit,
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subghz_scene_saved_menu_submenu_callback,
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subghz);
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@ -60,17 +60,6 @@ static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
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{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
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{CC1101_FREND1, 0xB6}, //
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -122,17 +111,6 @@ static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
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{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
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{CC1101_FREND1, 0xB6}, //
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x88},
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{CC1101_TEST1, 0x31},
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -177,17 +155,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
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{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
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{CC1101_FREND1, 0x56},
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -232,17 +199,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev4_76khz_async_regs[][2] = {
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{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
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{CC1101_FREND1, 0x56},
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -279,17 +235,9 @@ static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
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{CC1101_FREND0, 0x10},
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{CC1101_FREND1, 0x56},
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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{CC1101_BSCFG, 0x1C},
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{CC1101_FSTEST, 0x59},
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{CC1101_TEST2, 0x81},
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{CC1101_TEST1, 0x35},
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{CC1101_TEST0, 0x09},
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/* End */
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{0, 0},
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};
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@ -322,13 +270,6 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
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{CC1101_AGCCTRL0, 0x91},
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{CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
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{CC1101_FSCAL3, 0xE9}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL2, 0x2A}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL1, 0x00}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL0, 0x1F}, //Frequency Synthesizer Calibration
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{CC1101_TEST2, 0x81}, //Various Test Settings
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{CC1101_TEST1, 0x35}, //Various Test Settings
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{CC1101_TEST0, 0x09}, //Various Test Settings
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/* End */
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{0, 0},
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};
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@ -687,7 +628,6 @@ uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
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}
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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return real_frequency;
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}
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@ -60,17 +60,6 @@ static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
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{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
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{CC1101_FREND1, 0xB6}, //
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -122,17 +111,6 @@ static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
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{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
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{CC1101_FREND1, 0xB6}, //
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x88},
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{CC1101_TEST1, 0x31},
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -177,17 +155,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
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{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
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{CC1101_FREND1, 0x56},
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -232,17 +199,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev4_76khz_async_regs[][2] = {
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{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
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{CC1101_FREND1, 0x56},
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/* Frequency Synthesizer Calibration, valid for 433.92 */
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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/* Magic f4ckery */
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{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
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{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
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/* End */
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{0, 0},
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};
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@ -279,17 +235,9 @@ static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
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{CC1101_FREND0, 0x10},
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{CC1101_FREND1, 0x56},
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{CC1101_FSCAL3, 0xE9},
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{CC1101_FSCAL2, 0x2A},
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{CC1101_FSCAL1, 0x00},
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{CC1101_FSCAL0, 0x1F},
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{CC1101_BSCFG, 0x1C},
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{CC1101_FSTEST, 0x59},
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{CC1101_TEST2, 0x81},
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{CC1101_TEST1, 0x35},
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{CC1101_TEST0, 0x09},
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/* End */
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{0, 0},
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};
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@ -322,13 +270,6 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
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{CC1101_AGCCTRL0, 0x91},
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{CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
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{CC1101_FSCAL3, 0xE9}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL2, 0x2A}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL1, 0x00}, //Frequency Synthesizer Calibration
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{CC1101_FSCAL0, 0x1F}, //Frequency Synthesizer Calibration
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{CC1101_TEST2, 0x81}, //Various Test Settings
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{CC1101_TEST1, 0x35}, //Various Test Settings
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{CC1101_TEST0, 0x09}, //Various Test Settings
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/* End */
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{0, 0},
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};
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@ -687,7 +628,6 @@ uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
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}
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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return real_frequency;
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}
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