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https://github.com/DarkFlippers/unleashed-firmware
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[FL-2149] SubGhz: Additional frequencies for testing (#920)
* SubGhz: add new frequency for testing * [FL-2149] SubGhz: power reduction for Australia Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
parent
cdfc420ddf
commit
51aa169c3b
8 changed files with 156 additions and 47 deletions
34
applications/subghz/helpers/subghz_testing.c
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34
applications/subghz/helpers/subghz_testing.c
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@ -0,0 +1,34 @@
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#include "subghz_testing.h"
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const uint32_t subghz_frequencies_testing[] = {
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/* 300 - 348 */
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300000000,
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304500000,
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313250000,
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315000000,
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321950000,
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348000000,
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/* 387 - 464 */
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387000000,
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433075000, /* LPD433 first */
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433825000,
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433920000, /* LPD433 mid */
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434420000,
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434775000, /* LPD433 last channels */
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438900000,
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464000000,
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/* 779 - 928 */
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779000000,
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868150000,
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868350000,
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868550000,
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915000000,
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925000000,
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926500000,
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927950000,
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928000000,
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};
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const uint32_t subghz_frequencies_count_testing =
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sizeof(subghz_frequencies_testing) / sizeof(uint32_t);
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const uint32_t subghz_frequencies_433_92_testing = 9;
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6
applications/subghz/helpers/subghz_testing.h
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6
applications/subghz/helpers/subghz_testing.h
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@ -0,0 +1,6 @@
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#pragma once
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#include "../subghz_i.h"
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extern const uint32_t subghz_frequencies_testing[];
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extern const uint32_t subghz_frequencies_count_testing;
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extern const uint32_t subghz_frequencies_433_92_testing;
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@ -1,5 +1,6 @@
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#include "subghz_test_carrier.h"
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#include "../subghz_i.h"
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#include "../helpers/subghz_testing.h"
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#include <math.h>
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#include <furi.h>
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@ -94,7 +95,7 @@ bool subghz_test_carrier_input(InputEvent* event, void* context) {
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if(event->key == InputKeyLeft) {
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if(model->frequency > 0) model->frequency--;
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} else if(event->key == InputKeyRight) {
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if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
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if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
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} else if(event->key == InputKeyDown) {
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if(model->path > 0) model->path--;
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} else if(event->key == InputKeyUp) {
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@ -108,7 +109,7 @@ bool subghz_test_carrier_input(InputEvent* event, void* context) {
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}
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model->real_frequency =
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furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
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furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
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furi_hal_subghz_set_path(model->path);
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if(model->status == SubghzTestCarrierModelStatusRx) {
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@ -141,9 +142,9 @@ void subghz_test_carrier_enter(void* context) {
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with_view_model(
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subghz_test_carrier->view, (SubghzTestCarrierModel * model) {
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model->frequency = subghz_frequencies_433_92; // 433
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model->frequency = subghz_frequencies_433_92_testing; // 433
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model->real_frequency =
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furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
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furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
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model->path = FuriHalSubGhzPathIsolate; // isolate
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model->rssi = 0.0f;
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model->status = SubghzTestCarrierModelStatusRx;
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@ -1,5 +1,6 @@
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#include "subghz_test_packet.h"
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#include "../subghz_i.h"
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#include "../helpers/subghz_testing.h"
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#include <math.h>
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#include <furi.h>
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@ -144,7 +145,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
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if(event->key == InputKeyLeft) {
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if(model->frequency > 0) model->frequency--;
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} else if(event->key == InputKeyRight) {
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if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
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if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
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} else if(event->key == InputKeyDown) {
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if(model->path > 0) model->path--;
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} else if(event->key == InputKeyUp) {
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@ -158,7 +159,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
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}
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model->real_frequency =
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furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
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furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
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furi_hal_subghz_set_path(model->path);
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if(model->status == SubghzTestPacketModelStatusRx) {
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@ -168,7 +169,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
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instance->encoder,
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0x00AABBCC,
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SUBGHZ_TEST_PACKET_COUNT,
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subghz_frequencies[model->frequency]);
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subghz_frequencies_testing[model->frequency]);
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if(!furi_hal_subghz_start_async_tx(
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subghz_encoder_princeton_yield, instance->encoder)) {
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model->status = SubghzTestPacketModelStatusOnlyRx;
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@ -191,9 +192,9 @@ void subghz_test_packet_enter(void* context) {
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with_view_model(
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instance->view, (SubghzTestPacketModel * model) {
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model->frequency = subghz_frequencies_433_92;
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model->frequency = subghz_frequencies_433_92_testing;
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model->real_frequency =
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furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
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furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
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model->path = FuriHalSubGhzPathIsolate; // isolate
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model->rssi = 0.0f;
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model->status = SubghzTestPacketModelStatusRx;
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@ -1,5 +1,6 @@
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#include "subghz_test_static.h"
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#include "../subghz_i.h"
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#include "../helpers/subghz_testing.h"
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#include <math.h>
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#include <furi.h>
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@ -81,7 +82,7 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
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if(event->key == InputKeyLeft) {
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if(model->frequency > 0) model->frequency--;
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} else if(event->key == InputKeyRight) {
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if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
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if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
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} else if(event->key == InputKeyDown) {
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if(model->button > 0) model->button--;
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} else if(event->key == InputKeyUp) {
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@ -89,13 +90,14 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
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}
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}
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model->real_frequency = subghz_frequencies[model->frequency];
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model->real_frequency = subghz_frequencies_testing[model->frequency];
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if(event->key == InputKeyOk) {
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NotificationApp* notification = furi_record_open("notification");
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if(event->type == InputTypePress) {
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furi_hal_subghz_idle();
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furi_hal_subghz_set_frequency_and_path(subghz_frequencies[model->frequency]);
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furi_hal_subghz_set_frequency_and_path(
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subghz_frequencies_testing[model->frequency]);
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if(!furi_hal_subghz_tx()) {
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instance->callback(SubghzTestStaticEventOnlyRx, instance->context);
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} else {
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@ -107,7 +109,7 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
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instance->encoder,
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subghz_test_static_keys[model->button],
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10000,
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subghz_frequencies[model->frequency]);
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subghz_frequencies_testing[model->frequency]);
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furi_hal_subghz_start_async_tx(
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subghz_encoder_princeton_yield, instance->encoder);
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@ -145,8 +147,8 @@ void subghz_test_static_enter(void* context) {
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with_view_model(
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instance->view, (SubghzTestStaticModel * model) {
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model->frequency = subghz_frequencies_433_92;
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model->real_frequency = subghz_frequencies[model->frequency];
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model->frequency = subghz_frequencies_433_92_testing;
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model->real_frequency = subghz_frequencies_testing[model->frequency];
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model->button = 0;
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return true;
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@ -1,5 +1,6 @@
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#include "furi-hal-subghz.h"
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#include "furi-hal-version.h"
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#include "furi-hal-rtc.h"
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#include <furi-hal-gpio.h>
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#include <furi-hal-spi.h>
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@ -14,6 +15,7 @@
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static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
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static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
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static volatile FuriHalSubGhzPreset furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
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static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
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// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
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@ -298,7 +300,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
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//1 : CRC calculation in TX and CRC check in RX enabled,
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//1 : Variable packet length mode. Packet length configured by the first byte after sync word
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{CC1101_PKTCTRL0,0x05},
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{CC1101_PKTCTRL0, 0x05},
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{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
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@ -315,7 +317,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
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{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
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{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
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{CC1101_AGCCTRL2, 0x43 }, //AGC Control
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{CC1101_AGCCTRL2, 0x43}, //AGC Control
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{CC1101_AGCCTRL1, 0x40},
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{CC1101_AGCCTRL0, 0x91},
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@ -333,7 +335,16 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
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static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
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0x00,
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0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
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0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
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0x00,
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0x00,
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0x00,
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0x00,
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0x00,
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0x00};
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static const uint8_t furi_hal_subghz_preset_ook_async_patable_au[8] = {
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0x00,
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0x86, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
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0x00,
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0x00,
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0x00,
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@ -371,6 +382,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
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void furi_hal_subghz_init() {
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furi_assert(furi_hal_subghz_state == SubGhzStateInit);
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furi_hal_subghz_state = SubGhzStateIdle;
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furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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@ -392,7 +404,8 @@ void furi_hal_subghz_init() {
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;
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// GD0 high
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
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while(hal_gpio_read(&gpio_cc1101_g0) != true)
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;
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@ -423,6 +436,8 @@ void furi_hal_subghz_sleep() {
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cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
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}
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void furi_hal_subghz_dump_state() {
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@ -453,9 +468,10 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
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} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
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furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
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furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
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} else{
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} else {
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furi_crash(NULL);
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}
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furi_hal_subghz_preset = preset;
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}
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void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
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@ -498,7 +514,8 @@ void furi_hal_subghz_flush_tx() {
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bool furi_hal_subghz_rx_pipe_not_empty() {
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CC1101RxBytes status[1];
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
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cc1101_read_reg(
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&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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// TODO: you can add a buffer overflow flag if needed
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if(status->NUM_RXBYTES > 0) {
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@ -627,6 +644,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
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!(value >= 433050000 && value <= 434790000) &&
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!(value >= 915000000 && value <= 928000000)) {
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} else {
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if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
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if((value >= 304100000 && value <= 315250000) &&
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((furi_hal_subghz_preset == FuriHalSubGhzPresetOok270Async) ||
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(furi_hal_subghz_preset == FuriHalSubGhzPresetOok650Async))) {
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furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable_au);
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}
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}
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is_allowed = true;
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}
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break;
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@ -647,14 +671,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
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}
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uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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if(furi_hal_subghz_is_tx_allowed(value)) {
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furi_hal_subghz_regulation = SubGhzRegulationTxRx;
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} else {
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furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
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}
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
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cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
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@ -672,13 +695,15 @@ void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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if(path == FuriHalSubGhzPath433) {
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hal_gpio_write(&gpio_rf_sw_0, 0);
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
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} else if(path == FuriHalSubGhzPath315) {
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hal_gpio_write(&gpio_rf_sw_0, 1);
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
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} else if(path == FuriHalSubGhzPath868) {
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hal_gpio_write(&gpio_rf_sw_0, 1);
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
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} else if(path == FuriHalSubGhzPathIsolate) {
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hal_gpio_write(&gpio_rf_sw_0, 0);
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
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@ -838,7 +863,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
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*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
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buffer++;
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samples--;
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if (!level) {
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if(!level) {
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furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
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} else {
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furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
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||||
|
@ -851,7 +876,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||
buffer++;
|
||||
samples--;
|
||||
|
||||
if (level) {
|
||||
if(level) {
|
||||
furi_hal_subghz_async_tx.duty_high += duration;
|
||||
} else {
|
||||
furi_hal_subghz_async_tx.duty_low += duration;
|
||||
|
@ -1014,8 +1039,15 @@ void furi_hal_subghz_stop_async_tx() {
|
|||
|
||||
free(furi_hal_subghz_async_tx.buffer);
|
||||
|
||||
float duty_cycle = 100.0f * (float)furi_hal_subghz_async_tx.duty_high / ((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||
FURI_LOG_D(TAG, "Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%", (float)furi_hal_subghz_async_tx.duty_high, (float)furi_hal_subghz_async_tx.duty_low, duty_cycle);
|
||||
float duty_cycle =
|
||||
100.0f * (float)furi_hal_subghz_async_tx.duty_high /
|
||||
((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||
FURI_LOG_D(
|
||||
TAG,
|
||||
"Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%",
|
||||
(float)furi_hal_subghz_async_tx.duty_high,
|
||||
(float)furi_hal_subghz_async_tx.duty_low,
|
||||
duty_cycle);
|
||||
|
||||
furi_hal_subghz_state = SubGhzStateIdle;
|
||||
}
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
#include "furi-hal-subghz.h"
|
||||
#include "furi-hal-version.h"
|
||||
#include "furi-hal-rtc.h"
|
||||
|
||||
#include <furi-hal-gpio.h>
|
||||
#include <furi-hal-spi.h>
|
||||
|
@ -14,6 +15,7 @@
|
|||
|
||||
static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
|
||||
static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||
static volatile FuriHalSubGhzPreset furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
||||
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
||||
|
@ -298,7 +300,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||
|
||||
//1 : CRC calculation in TX and CRC check in RX enabled,
|
||||
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
||||
{CC1101_PKTCTRL0,0x05},
|
||||
{CC1101_PKTCTRL0, 0x05},
|
||||
|
||||
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
||||
|
||||
|
@ -315,7 +317,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
||||
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
||||
|
||||
{CC1101_AGCCTRL2, 0x43 }, //AGC Control
|
||||
{CC1101_AGCCTRL2, 0x43}, //AGC Control
|
||||
{CC1101_AGCCTRL1, 0x40},
|
||||
{CC1101_AGCCTRL0, 0x91},
|
||||
|
||||
|
@ -333,7 +335,16 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||
|
||||
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
||||
0x00,
|
||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
||||
0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00};
|
||||
static const uint8_t furi_hal_subghz_preset_ook_async_patable_au[8] = {
|
||||
0x00,
|
||||
0x86, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
|
@ -371,6 +382,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
|
|||
void furi_hal_subghz_init() {
|
||||
furi_assert(furi_hal_subghz_state == SubGhzStateInit);
|
||||
furi_hal_subghz_state = SubGhzStateIdle;
|
||||
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
|
@ -392,7 +404,8 @@ void furi_hal_subghz_init() {
|
|||
;
|
||||
|
||||
// GD0 high
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
cc1101_write_reg(
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
while(hal_gpio_read(&gpio_cc1101_g0) != true)
|
||||
;
|
||||
|
||||
|
@ -423,6 +436,8 @@ void furi_hal_subghz_sleep() {
|
|||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_dump_state() {
|
||||
|
@ -453,9 +468,10 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
|
|||
} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
|
||||
furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
|
||||
furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
|
||||
} else{
|
||||
} else {
|
||||
furi_crash(NULL);
|
||||
}
|
||||
furi_hal_subghz_preset = preset;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
|
||||
|
@ -498,7 +514,8 @@ void furi_hal_subghz_flush_tx() {
|
|||
bool furi_hal_subghz_rx_pipe_not_empty() {
|
||||
CC1101RxBytes status[1];
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||
cc1101_read_reg(
|
||||
&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
// TODO: you can add a buffer overflow flag if needed
|
||||
if(status->NUM_RXBYTES > 0) {
|
||||
|
@ -627,6 +644,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||
!(value >= 433050000 && value <= 434790000) &&
|
||||
!(value >= 915000000 && value <= 928000000)) {
|
||||
} else {
|
||||
if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
|
||||
if((value >= 304100000 && value <= 315250000) &&
|
||||
((furi_hal_subghz_preset == FuriHalSubGhzPresetOok270Async) ||
|
||||
(furi_hal_subghz_preset == FuriHalSubGhzPresetOok650Async))) {
|
||||
furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable_au);
|
||||
}
|
||||
}
|
||||
is_allowed = true;
|
||||
}
|
||||
break;
|
||||
|
@ -647,14 +671,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||
}
|
||||
|
||||
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
if(furi_hal_subghz_is_tx_allowed(value)) {
|
||||
furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||
} else {
|
||||
furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
|
||||
}
|
||||
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
||||
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
|
@ -672,13 +695,15 @@ void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
|
|||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
if(path == FuriHalSubGhzPath433) {
|
||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
cc1101_write_reg(
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
} else if(path == FuriHalSubGhzPath315) {
|
||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
} else if(path == FuriHalSubGhzPath868) {
|
||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
cc1101_write_reg(
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
} else if(path == FuriHalSubGhzPathIsolate) {
|
||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
|
@ -838,7 +863,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||
*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||
buffer++;
|
||||
samples--;
|
||||
if (!level) {
|
||||
if(!level) {
|
||||
furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||
} else {
|
||||
furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||
|
@ -851,7 +876,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||
buffer++;
|
||||
samples--;
|
||||
|
||||
if (level) {
|
||||
if(level) {
|
||||
furi_hal_subghz_async_tx.duty_high += duration;
|
||||
} else {
|
||||
furi_hal_subghz_async_tx.duty_low += duration;
|
||||
|
@ -1014,8 +1039,15 @@ void furi_hal_subghz_stop_async_tx() {
|
|||
|
||||
free(furi_hal_subghz_async_tx.buffer);
|
||||
|
||||
float duty_cycle = 100.0f * (float)furi_hal_subghz_async_tx.duty_high / ((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||
FURI_LOG_D(TAG, "Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%", (float)furi_hal_subghz_async_tx.duty_high, (float)furi_hal_subghz_async_tx.duty_low, duty_cycle);
|
||||
float duty_cycle =
|
||||
100.0f * (float)furi_hal_subghz_async_tx.duty_high /
|
||||
((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||
FURI_LOG_D(
|
||||
TAG,
|
||||
"Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%",
|
||||
(float)furi_hal_subghz_async_tx.duty_high,
|
||||
(float)furi_hal_subghz_async_tx.duty_low,
|
||||
duty_cycle);
|
||||
|
||||
furi_hal_subghz_state = SubGhzStateIdle;
|
||||
}
|
||||
|
|
|
@ -16,6 +16,7 @@ extern "C" {
|
|||
|
||||
/** Radio Presets */
|
||||
typedef enum {
|
||||
FuriHalSubGhzPresetIDLE, /**< default configuration */
|
||||
FuriHalSubGhzPresetOok270Async, /**< OOK, bandwidth 270kHz, asynchronous */
|
||||
FuriHalSubGhzPresetOok650Async, /**< OOK, bandwidth 650kHz, asynchronous */
|
||||
FuriHalSubGhzPreset2FSKDev238Async, /**< FM, deviation 2.380371 kHz, asynchronous */
|
||||
|
|
Loading…
Reference in a new issue