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https://github.com/DarkFlippers/unleashed-firmware
synced 2024-11-27 15:00:46 +00:00
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commit
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1 changed files with 56 additions and 0 deletions
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@ -5,9 +5,13 @@
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#include "../subghz_i.h"
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<<<<<<< HEAD
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#define SUBGHZ_FREQUENCY_ANALYZER_THRESHOLD -90.0f
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=======
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#define TAG "SubghzFrequencyAnalyzerWorker"
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#define SUBGHZ_FREQUENCY_ANALYZER_THRESHOLD -95.0f
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>>>>>>> upstream/dev
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static const uint8_t subghz_preset_ook_58khz[][2] = {
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{CC1101_MDMCFG4, 0b11110111}, // Rx BW filter is 58.035714kHz
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@ -37,7 +41,11 @@ struct SubGhzFrequencyAnalyzerWorker {
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static void subghz_frequency_analyzer_worker_load_registers(const uint8_t data[][2]) {
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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<<<<<<< HEAD
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uint32_t i = 0;
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=======
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size_t i = 0;
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>>>>>>> upstream/dev
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while(data[i][0]) {
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, data[i][0], data[i][1]);
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i++;
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@ -70,8 +78,14 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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SubGhzFrequencyAnalyzerWorker* instance = context;
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FrequencyRSSI frequency_rssi = {.frequency = 0, .rssi = 0};
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<<<<<<< HEAD
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float rssi;
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uint32_t frequency;
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uint32_t frequency_start;
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=======
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float rssi = 0;
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uint32_t frequency = 0;
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>>>>>>> upstream/dev
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CC1101Status status;
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//Start CC1101
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@ -81,6 +95,20 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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cc1101_flush_rx(&furi_hal_spi_bus_handle_subghz);
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cc1101_flush_tx(&furi_hal_spi_bus_handle_subghz);
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW);
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<<<<<<< HEAD
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz,
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CC1101_AGCCTRL2,
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0b0000111); // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz,
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CC1101_AGCCTRL1,
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0b00000000); // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
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cc1101_write_reg(
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&furi_hal_spi_bus_handle_subghz,
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CC1101_AGCCTRL0,
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0b00000001); // 00 - No hysteresis, medium asymmetric dead zone, medium gain ; 00 - 8 samples agc; 00 - Normal AGC, 01 - 8dB boundary
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=======
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cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_MDMCFG3,
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0b11111111); // symbol rate
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cc1101_write_reg(
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@ -95,6 +123,7 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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&furi_hal_spi_bus_handle_subghz,
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CC1101_AGCCTRL0,
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0b00110000); // 00 - No hysteresis, medium asymmetric dead zone, medium gain ; 11 - 64 samples agc; 00 - Normal AGC, 00 - 4dB boundary
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>>>>>>> upstream/dev
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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@ -111,7 +140,10 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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furi_hal_subghz_idle();
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subghz_frequency_analyzer_worker_load_registers(subghz_preset_ook_650khz);
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<<<<<<< HEAD
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=======
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// First stage: coarse scan
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>>>>>>> upstream/dev
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for(size_t i = 0; i < subghz_setting_get_frequency_count(instance->setting); i++) {
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if(furi_hal_subghz_is_frequency_valid(
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subghz_setting_get_frequency(instance->setting, i))) {
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@ -129,9 +161,13 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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cc1101_switch_to_rx(&furi_hal_spi_bus_handle_subghz);
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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<<<<<<< HEAD
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osDelay(3);
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=======
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// delay will be in range between 1 and 2ms
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osDelay(2);
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>>>>>>> upstream/dev
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rssi = furi_hal_subghz_get_rssi();
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rssi_avg += rssi;
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@ -146,6 +182,16 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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}
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}
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<<<<<<< HEAD
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if(frequency_rssi.rssi > SUBGHZ_FREQUENCY_ANALYZER_THRESHOLD) {
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// -0.5 ... 433.92 ... +0.5
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frequency_start = frequency_rssi.frequency - 500000;
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frequency_rssi.rssi = -127.0;
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furi_hal_subghz_idle();
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subghz_frequency_analyzer_worker_load_registers(subghz_preset_ook_58khz);
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//step 10KHz
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for(uint32_t i = frequency_start; i < frequency_start + 500000; i += 10000) {
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=======
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FURI_LOG_T(
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TAG,
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"RSSI: avg %f, max %f at %u, min %f",
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@ -165,6 +211,7 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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for(uint32_t i = frequency_rssi.frequency - 300000;
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i < frequency_rssi.frequency + 300000;
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i += 20000) {
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>>>>>>> upstream/dev
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if(furi_hal_subghz_is_frequency_valid(i)) {
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furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
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cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
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@ -178,9 +225,13 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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cc1101_switch_to_rx(&furi_hal_spi_bus_handle_subghz);
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furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
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<<<<<<< HEAD
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osDelay(5);
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=======
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// delay will be in range between 1 and 2ms
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osDelay(2);
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>>>>>>> upstream/dev
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rssi = furi_hal_subghz_get_rssi();
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if(frequency_rssi.rssi < rssi) {
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frequency_rssi.rssi = rssi;
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@ -190,11 +241,16 @@ static int32_t subghz_frequency_analyzer_worker_thread(void* context) {
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}
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}
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<<<<<<< HEAD
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if(frequency_rssi.rssi > SUBGHZ_FREQUENCY_ANALYZER_THRESHOLD) {
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instance->count_repet = 20;
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=======
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// Deliver results
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if(frequency_rssi.rssi > SUBGHZ_FREQUENCY_ANALYZER_THRESHOLD) {
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FURI_LOG_D(TAG, "=:%u:%f", frequency_rssi.frequency, (double)frequency_rssi.rssi);
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instance->sample_hold_counter = 20;
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>>>>>>> upstream/dev
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if(instance->filVal) {
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frequency_rssi.frequency =
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subghz_frequency_analyzer_worker_expRunningAverageAdaptive(
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