unleashed-firmware/targets/f7/furi_hal/furi_hal_random.c

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#include <furi_hal_random.h>
#include <furi_hal_bus.h>
#include <furi.h>
#include <stm32wbxx_ll_rng.h>
#include <stm32wbxx_ll_rcc.h>
#include <stm32wbxx_ll_hsem.h>
New clock switch schema, fixes random core2 crashes (#3008) * Updated stack to 1.17.0 * hal: ble: Fixed stack config * Bumped stack version in config * scripts: added validation of copro stack version in update bundles * Copro: update to 1.17.2 * FuriHal: adjust tick frequency for HSE as sys clk * FuriHal: adjust systick reload on sys clock change * Sync api and format sources * scripts: updated ob.data for newer stack * FuriHal: return core2 hse pll transition on deep sleep * FuriHal: cleanup ble glue * FuriHal: rework ble glue, allow shci_send in critical section * FuriHal: sync api symbols * FuriHal: cleanup BLE glue, remove unused garbage and duplicate declarations * FuriHal: BLE glue cleanup, 2nd iteration * FuriHal: hide tick drift reports under FURI_HAL_OS_DEBUG * Lib: sync stm32wb_copro with latest dev * FuriHal: ble-glue, slightly less editable device name and duplicate definition cleanup * FuriHal: update ble config options, enable some optimizations and ext adv * FuriHal: update clock switch method documentation * FuriHal: better SNBRSA bug workaround fix * FuriHal: complete comment about tick skew * FuriHal: proper condition in clock hsi2hse transition * FuriHal: move PLL start to hse2pll routine, fix lockup caused by core2 switching to HSE before us * FuriHal: explicit HSE start before switch * FuriHal: fix documentation and move flash latency change to later stage, remove duplicate LL_RCC_SetRFWKPClockSource call --------- Co-authored-by: hedger <hedger@nanode.su> Co-authored-by: hedger <hedger@users.noreply.github.com>
2023-09-19 14:22:21 +00:00
#include <hsem_map.h>
#define TAG "FuriHalRandom"
static uint32_t furi_hal_random_read_rng() {
while(LL_RNG_IsActiveFlag_CECS(RNG) && LL_RNG_IsActiveFlag_SECS(RNG) &&
!LL_RNG_IsActiveFlag_DRDY(RNG)) {
/* Error handling as described in RM0434, pg. 582-583 */
if(LL_RNG_IsActiveFlag_CECS(RNG)) {
/* Clock error occurred */
LL_RNG_ClearFlag_CEIS(RNG);
}
if(LL_RNG_IsActiveFlag_SECS(RNG)) {
/* Noise source error occurred */
LL_RNG_ClearFlag_SEIS(RNG);
for(uint32_t i = 0; i < 12; ++i) {
const volatile uint32_t discard = LL_RNG_ReadRandData32(RNG);
UNUSED(discard);
}
}
}
return LL_RNG_ReadRandData32(RNG);
}
void furi_hal_random_init() {
furi_hal_bus_enable(FuriHalBusRNG);
LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_CLK48);
}
uint32_t furi_hal_random_get() {
while(LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
LL_RNG_Enable(RNG);
const uint32_t random_val = furi_hal_random_read_rng();
LL_RNG_Disable(RNG);
;
LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);
return random_val;
}
void furi_hal_random_fill_buf(uint8_t* buf, uint32_t len) {
while(LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
LL_RNG_Enable(RNG);
for(uint32_t i = 0; i < len; i += 4) {
const uint32_t random_val = furi_hal_random_read_rng();
uint8_t len_cur = ((i + 4) < len) ? (4) : (len - i);
memcpy(&buf[i], &random_val, len_cur);
}
LL_RNG_Disable(RNG);
LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);
}
void srand(unsigned seed) {
UNUSED(seed);
}
int rand() {
return (furi_hal_random_get() & RAND_MAX);
}
long random() {
return (furi_hal_random_get() & RAND_MAX);
}