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53a422cc50
Import cvmx-pko3-compat.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
656 lines
18 KiB
C
656 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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*/
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#include <errno.h>
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#include <log.h>
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#include <time.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-scratch.h>
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#include <mach/cvmx-hwfau.h>
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#include <mach/cvmx-fau.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-pki.h>
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#include <mach/cvmx-pko3.h>
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#include <mach/cvmx-pko3-queue.h>
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#include <mach/cvmx-pko3-resources.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-bgx.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-helper-pki.h>
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/* #undef CVMX_ENABLE_PARAMETER_CHECKING */
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/* #define CVMX_ENABLE_PARAMETER_CHECKING 1 */
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/* #define __PKO3_NATIVE_PTR */
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static inline u64 cvmx_pko3_legacy_paddr(unsigned int node, u64 addr)
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{
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u64 paddr;
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paddr = node;
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paddr = (addr & ((1ull << 40) - 1)) | (paddr << 40);
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return paddr;
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}
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#if CVMX_ENABLE_PARAMETER_CHECKING
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/**
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* @INTERNAL
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*
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* Verify the integrity of a legacy buffer link pointer,
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*
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* Note that the IPD/PIP/PKO hardware would sometimes
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* round-up the buf_ptr->size field of the last buffer in a chain to the next
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* cache line size, so the sum of buf_ptr->size
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* fields for a packet may exceed total_bytes by up to 127 bytes.
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*
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* @returns 0 on success, a negative number on error.
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*/
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static int cvmx_pko3_legacy_bufptr_validate(cvmx_buf_ptr_t buf_ptr,
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unsigned int gather,
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unsigned int buffers,
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unsigned int total_bytes)
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{
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unsigned int node = cvmx_get_node_num();
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unsigned int segs = 0, bytes = 0;
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unsigned int phys_addr;
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cvmx_buf_ptr_t ptr;
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int delta;
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if (buffers == 0) {
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return -1;
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} else if (buffers == 1) {
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delta = buf_ptr.s.size - total_bytes;
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if (delta < 0 || delta > 127)
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return -2;
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} else if (gather) {
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cvmx_buf_ptr_t *vptr;
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/* Validate gather list */
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if (buf_ptr.s.size < buffers)
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return -3;
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phys_addr = cvmx_pko3_legacy_paddr(node, buf_ptr.s.addr);
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vptr = cvmx_phys_to_ptr(phys_addr);
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for (segs = 0; segs < buffers; segs++)
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bytes += vptr[segs].s.size;
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delta = bytes - total_bytes;
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if (delta < 0 || delta > 127)
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return -4;
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} else {
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void *vptr;
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/* Validate linked buffers */
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ptr = buf_ptr;
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for (segs = 0; segs < buffers; segs++) {
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bytes += ptr.s.size;
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phys_addr = cvmx_pko3_legacy_paddr(node, ptr.s.addr);
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vptr = cvmx_phys_to_ptr(phys_addr);
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memcpy(&ptr, vptr - sizeof(u64), sizeof(u64));
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}
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delta = bytes - total_bytes;
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if (delta < 0 || delta > 127)
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return -5;
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}
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return 0;
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}
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#endif /* CVMX_ENABLE_PARAMETER_CHECKING */
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/*
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* @INTERNAL
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*
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* Implementation note:
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* When the packet is sure to not need a jump_buf,
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* it will be written directly into cvmseg.
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* When the packet might not fit into cvmseg with all
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* of its descriptors, a jump_buf is allocated a priori,
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* and only header is first placed into cvmseg, all other
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* descriptors are placed into jump_buf, and finally
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* the PKO_SEND_JUMP_S is written to cvmseg.
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* This is because if there are no EXT or TSO descriptors,
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* then HDR must be first, and JMP second and that is all
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* that should go into cvmseg.
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*/
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struct __cvmx_pko3_legacy_desc {
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u64 *cmd_words;
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u64 *jump_buf_base_ptr;
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unsigned short word_count;
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short last_pool;
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u8 port_node;
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u8 aura_node;
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u8 jump_buf_size;
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};
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/**
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* @INTERNAL
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*
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* Add a subdescriptor into a command buffer,
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* and handle command-buffer overflow by allocating a JUMP_s buffer
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* from PKO3 internal AURA.
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*/
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static int __cvmx_pko3_cmd_subdc_add(struct __cvmx_pko3_legacy_desc *desc,
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u64 subdc)
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{
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/* SEND_JUMP_S missing on Pass1.X */
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if (desc->word_count >= 15) {
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printf("%s: ERROR: too many segments\n", __func__);
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return -EBADF;
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}
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/* Handle small commands simply */
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if (cvmx_likely(!desc->jump_buf_base_ptr)) {
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desc->cmd_words[desc->word_count] = subdc;
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(desc->word_count)++;
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return desc->word_count;
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}
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if (cvmx_unlikely(desc->jump_buf_size >= 255))
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return -ENOMEM;
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desc->jump_buf_base_ptr[desc->jump_buf_size++] = subdc;
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return desc->word_count + desc->jump_buf_size;
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}
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/**
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* @INTERNAL
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*
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* Finalize command buffer
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*
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* @returns: number of command words in command buffer and jump buffer
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* or negative number on error.
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*/
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static int __cvmx_pko3_cmd_done(struct __cvmx_pko3_legacy_desc *desc)
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{
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short pko_aura;
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cvmx_pko_buf_ptr_t jump_s;
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cvmx_pko_send_aura_t aura_s;
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/* no jump buffer, nothing to do */
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if (!desc->jump_buf_base_ptr)
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return desc->word_count;
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desc->word_count++;
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/* Verify number of words is 15 */
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if (desc->word_count != 2) {
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printf("ERROR: %s: internal error, word_count=%d\n", __func__,
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desc->word_count);
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return -EINVAL;
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}
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/* Add SEND_AURA_S at the end of jump_buf */
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pko_aura = __cvmx_pko3_aura_get(desc->port_node);
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aura_s.u64 = 0;
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aura_s.s.aura = pko_aura;
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aura_s.s.offset = 0;
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aura_s.s.alg = AURAALG_NOP;
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aura_s.s.subdc4 = CVMX_PKO_SENDSUBDC_AURA;
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desc->jump_buf_base_ptr[desc->jump_buf_size++] = aura_s.u64;
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/* Add SEND_JUMPS to point to jump_buf */
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jump_s.u64 = 0;
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jump_s.s.subdc3 = CVMX_PKO_SENDSUBDC_JUMP;
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jump_s.s.addr = cvmx_ptr_to_phys(desc->jump_buf_base_ptr);
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jump_s.s.i = 1; /* F=1: Free this buffer when done */
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jump_s.s.size = desc->jump_buf_size;
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desc->cmd_words[1] = jump_s.u64;
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return desc->word_count + desc->jump_buf_size;
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}
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/**
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* @INTERNAL
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*
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* Handle buffer pools for PKO legacy transmit operation
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*/
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static inline int cvmx_pko3_legacy_pool(struct __cvmx_pko3_legacy_desc *desc,
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int pool)
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{
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cvmx_pko_send_aura_t aura_s;
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unsigned int aura;
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if (cvmx_unlikely(desc->last_pool == pool))
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return 0;
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aura = desc->aura_node << 10; /* LAURA=AURA[0..9] */
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aura |= pool;
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if (cvmx_likely(desc->last_pool < 0)) {
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cvmx_pko_send_hdr_t *hdr_s;
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hdr_s = (void *)&desc->cmd_words[0];
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/* Create AURA from legacy pool (assume LAURA==POOL */
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hdr_s->s.aura = aura;
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desc->last_pool = pool;
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return 0;
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}
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aura_s.u64 = 0;
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aura_s.s.subdc4 = CVMX_PKO_SENDSUBDC_AURA;
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aura_s.s.offset = 0;
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aura_s.s.alg = AURAALG_NOP;
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aura |= pool;
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aura_s.s.aura = aura;
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desc->last_pool = pool;
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return __cvmx_pko3_cmd_subdc_add(desc, aura_s.u64);
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}
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/**
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* @INTERNAL
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*
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* Backward compatibility for packet transmission using legacy PKO command.
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*
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* NOTE: Only supports output on node-local ports.
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*
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* TBD: Could embed destination node in extended DQ number.
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*/
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cvmx_pko_return_value_t
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cvmx_pko3_legacy_xmit(unsigned int dq, cvmx_pko_command_word0_t pko_command,
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cvmx_buf_ptr_t packet, u64 addr, bool tag_sw)
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{
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cvmx_pko_query_rtn_t pko_status;
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cvmx_pko_send_hdr_t *hdr_s;
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struct __cvmx_pko3_legacy_desc desc;
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u8 *data_ptr;
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unsigned int node, seg_cnt;
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int res;
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cvmx_buf_ptr_pki_t bptr;
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seg_cnt = pko_command.s.segs;
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desc.cmd_words = cvmx_pko3_cvmseg_addr();
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/* Allocate from local aura, assume all old-pools are local */
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node = cvmx_get_node_num();
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desc.aura_node = node;
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/* Derive destination node from dq */
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desc.port_node = dq >> 10;
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dq &= (1 << 10) - 1;
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desc.word_count = 1;
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desc.last_pool = -1;
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/* For small packets, write descriptors directly to CVMSEG
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* but for longer packets use jump_buf
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*/
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if (seg_cnt < 7 || OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X)) {
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desc.jump_buf_size = 0;
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desc.jump_buf_base_ptr = NULL;
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} else {
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unsigned int pko_aura = __cvmx_pko3_aura_get(desc.port_node);
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cvmx_fpa3_gaura_t aura =
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__cvmx_fpa3_gaura(pko_aura >> 10, pko_aura & 0x3ff);
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/* Allocate from internal AURA, size is 4KiB */
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desc.jump_buf_base_ptr = cvmx_fpa3_alloc(aura);
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if (!desc.jump_buf_base_ptr)
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return -ENOMEM;
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desc.jump_buf_size = 0;
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}
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/* Native buffer-pointer for error checiing */
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bptr.u64 = packet.u64;
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#if CVMX_ENABLE_PARAMETER_CHECKING
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if (seg_cnt == 1 && bptr.size == pko_command.s.total_bytes) {
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/*
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* Special case for native buffer pointer:
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* This is the only case where the native pointer-style can be
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* automatically identified, that is when an entire packet
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* fits into a single buffer by the PKI.
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* The use of the native buffers with this function
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* should be avoided.
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*/
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debug("%s: WARNING: Native buffer-pointer\n", __func__);
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} else {
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/* The buffer ptr is assume to be received in legacy format */
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res = cvmx_pko3_legacy_bufptr_validate(
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packet, pko_command.s.gather, pko_command.s.segs,
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pko_command.s.total_bytes);
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if (res < 0) {
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debug("%s: ERROR: Not a valid packet pointer <%d>\n",
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__func__, res);
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return CVMX_PKO_CMD_QUEUE_INIT_ERROR;
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}
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}
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#endif /* CVMX_ENABLE_PARAMETER_CHECKING */
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/* Squash warnings */
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(void)bptr;
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/*** Translate legacy PKO fields into PKO3 PKO_SEND_HDR_S ***/
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/* PKO_SEND_HDR_S is alwasy the first word in the command */
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hdr_s = (void *)&desc.cmd_words[0];
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hdr_s->u64 = 0;
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/* Copy total packet size */
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hdr_s->s.total = pko_command.s.total_bytes;
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/* Endianness */
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hdr_s->s.le = pko_command.s.le;
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/* N2 is the same meaning */
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if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))
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hdr_s->s.n2 = 0; /* L2 allocate everything */
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else
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hdr_s->s.n2 = pko_command.s.n2;
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/* DF bit has the same meaning */
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hdr_s->s.df = pko_command.s.dontfree;
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/* II bit has the same meaning */
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hdr_s->s.ii = pko_command.s.ignore_i;
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/* non-zero IP header offset requires L3/L4 checksum calculation */
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if (cvmx_unlikely(pko_command.s.ipoffp1 > 0)) {
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u8 ipoff, ip0, l4_proto = 0;
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/* Get data pointer for header inspection below */
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if (pko_command.s.gather) {
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cvmx_buf_ptr_t *p_ptr;
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cvmx_buf_ptr_t blk;
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p_ptr = cvmx_phys_to_ptr(
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cvmx_pko3_legacy_paddr(node, packet.s.addr));
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blk = p_ptr[0];
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data_ptr = cvmx_phys_to_ptr(
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cvmx_pko3_legacy_paddr(node, blk.s.addr));
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} else {
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data_ptr = cvmx_phys_to_ptr(
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cvmx_pko3_legacy_paddr(node, packet.s.addr));
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}
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/* Get IP header offset */
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ipoff = pko_command.s.ipoffp1 - 1;
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/* Parse IP header, version, L4 protocol */
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hdr_s->s.l3ptr = ipoff;
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ip0 = data_ptr[ipoff];
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/* IPv4 header length, checksum offload */
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if ((ip0 >> 4) == 4) {
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hdr_s->s.l4ptr = hdr_s->s.l3ptr + ((ip0 & 0xf) << 2);
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l4_proto = data_ptr[ipoff + 9];
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hdr_s->s.ckl3 = 1; /* Only valid for IPv4 */
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}
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/* IPv6 header length is fixed, no checksum */
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if ((ip0 >> 4) == 6) {
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hdr_s->s.l4ptr = hdr_s->s.l3ptr + 40;
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l4_proto = data_ptr[ipoff + 6];
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}
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/* Set L4 checksum algo based on L4 protocol */
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if (l4_proto == 6)
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hdr_s->s.ckl4 = /* TCP */ 2;
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else if (l4_proto == 17)
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hdr_s->s.ckl4 = /* UDP */ 1;
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else if (l4_proto == 132)
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hdr_s->s.ckl4 = /* SCTP */ 3;
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else
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hdr_s->s.ckl4 = /* Unknown */ 0;
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}
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if (pko_command.s.gather) {
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/* Process legacy gather list */
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cvmx_pko_buf_ptr_t gather_s;
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cvmx_buf_ptr_t *p_ptr;
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cvmx_buf_ptr_t blk;
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unsigned int i;
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/* Get gather list pointer */
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p_ptr = cvmx_phys_to_ptr(
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cvmx_pko3_legacy_paddr(node, packet.s.addr));
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blk = p_ptr[0];
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/* setup data_ptr */
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data_ptr = cvmx_phys_to_ptr(
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cvmx_pko3_legacy_paddr(node, blk.s.addr));
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for (i = 0; i < seg_cnt; i++) {
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if (cvmx_unlikely(cvmx_pko3_legacy_pool(
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&desc, blk.s.pool) < 0))
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return CVMX_PKO_NO_MEMORY;
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/* Insert PKO_SEND_GATHER_S for the current buffer */
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gather_s.u64 = 0;
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gather_s.s.subdc3 = CVMX_PKO_SENDSUBDC_GATHER;
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gather_s.s.size = blk.s.size;
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gather_s.s.i = blk.s.i;
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gather_s.s.addr =
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cvmx_pko3_legacy_paddr(node, blk.s.addr);
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, gather_s.u64);
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
|
|
/* get next bufptr */
|
|
blk = p_ptr[i + 1];
|
|
} /* for i */
|
|
|
|
/* Free original gather-list buffer */
|
|
if ((pko_command.s.ignore_i && !pko_command.s.dontfree) ||
|
|
packet.s.i == pko_command.s.dontfree)
|
|
cvmx_fpa_free_nosync(p_ptr, packet.s.pool,
|
|
(i - 1) / 16 + 1);
|
|
} else {
|
|
/* Process legacy linked buffer list */
|
|
cvmx_pko_buf_ptr_t gather_s;
|
|
cvmx_buf_ptr_t blk;
|
|
void *vptr;
|
|
|
|
data_ptr = cvmx_phys_to_ptr(
|
|
cvmx_pko3_legacy_paddr(node, packet.s.addr));
|
|
blk = packet;
|
|
|
|
/*
|
|
* Legacy linked-buffers converted into flat gather list
|
|
* so that the AURA can optionally be changed to reflect
|
|
* the POOL number in the legacy pointers
|
|
*/
|
|
do {
|
|
/* Insert PKO_SEND_AURA_S if pool changes */
|
|
if (cvmx_unlikely(cvmx_pko3_legacy_pool(
|
|
&desc, blk.s.pool) < 0))
|
|
return CVMX_PKO_NO_MEMORY;
|
|
|
|
/* Insert PKO_SEND_GATHER_S for the current buffer */
|
|
gather_s.u64 = 0;
|
|
gather_s.s.subdc3 = CVMX_PKO_SENDSUBDC_GATHER;
|
|
gather_s.s.size = blk.s.size;
|
|
gather_s.s.i = blk.s.i;
|
|
gather_s.s.addr =
|
|
cvmx_pko3_legacy_paddr(node, blk.s.addr);
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, gather_s.u64);
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
|
|
/* Get the next buffer pointer */
|
|
vptr = cvmx_phys_to_ptr(
|
|
cvmx_pko3_legacy_paddr(node, blk.s.addr));
|
|
memcpy(&blk, vptr - sizeof(blk), sizeof(blk));
|
|
|
|
/* Decrement segment count */
|
|
seg_cnt--;
|
|
|
|
} while (seg_cnt > 0);
|
|
}
|
|
|
|
/* This field indicates the presence of 3rd legacy command word */
|
|
/* NOTE: legacy 3rd word may contain CN78XX native phys addr already */
|
|
if (cvmx_unlikely(pko_command.s.rsp)) {
|
|
/* PTP bit in word3 is not supported -
|
|
* can not be distibguished from larger phys_addr[42..41]
|
|
*/
|
|
if (pko_command.s.wqp) {
|
|
/* <addr> is an SSO WQE */
|
|
cvmx_wqe_word1_t *wqe_p;
|
|
cvmx_pko_send_work_t work_s;
|
|
|
|
work_s.u64 = 0;
|
|
work_s.s.subdc4 = CVMX_PKO_SENDSUBDC_WORK;
|
|
work_s.s.addr = addr;
|
|
/* Assume WQE is legacy format too */
|
|
wqe_p = cvmx_phys_to_ptr(addr + sizeof(u64));
|
|
work_s.s.grp = wqe_p->cn38xx.grp;
|
|
work_s.s.tt = wqe_p->tag_type;
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, work_s.u64);
|
|
} else {
|
|
cvmx_pko_send_mem_t mem_s;
|
|
/* MEMALG_SET broken on Pass1 */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_0)) {
|
|
debug("%s: ERROR: PKO byte-clear not supported\n",
|
|
__func__);
|
|
}
|
|
/* <addr> is a physical address of byte clear */
|
|
mem_s.u64 = 0;
|
|
mem_s.s.subdc4 = CVMX_PKO_SENDSUBDC_MEM;
|
|
mem_s.s.addr = addr;
|
|
mem_s.s.dsz = MEMDSZ_B8;
|
|
mem_s.s.alg = MEMALG_SET;
|
|
mem_s.s.offset = 0;
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, mem_s.u64);
|
|
}
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
|
|
/* FAU counter binding reg0 */
|
|
if (pko_command.s.reg0) {
|
|
cvmx_pko_send_mem_t mem_s;
|
|
|
|
debug("%s: Legacy FAU commands: reg0=%#x sz0=%#x\n", __func__,
|
|
pko_command.s.reg0, pko_command.s.size0);
|
|
mem_s.u64 = 0;
|
|
mem_s.s.subdc4 = CVMX_PKO_SENDSUBDC_MEM;
|
|
mem_s.s.addr = cvmx_ptr_to_phys(
|
|
CASTPTR(void, __cvmx_fau_sw_addr(pko_command.s.reg0)));
|
|
if (cvmx_likely(pko_command.s.size0 == CVMX_FAU_OP_SIZE_64))
|
|
mem_s.s.dsz = MEMDSZ_B64;
|
|
else if (pko_command.s.size0 == CVMX_FAU_OP_SIZE_32)
|
|
mem_s.s.dsz = MEMDSZ_B32;
|
|
else if (pko_command.s.size0 == CVMX_FAU_OP_SIZE_16)
|
|
mem_s.s.dsz = MEMDSZ_B16;
|
|
else
|
|
mem_s.s.dsz = MEMDSZ_B8;
|
|
|
|
if (mem_s.s.dsz == MEMDSZ_B16 || mem_s.s.dsz == MEMDSZ_B8)
|
|
debug("%s: ERROR: 8/16 bit decrement unsupported",
|
|
__func__);
|
|
|
|
mem_s.s.offset = pko_command.s.subone0;
|
|
if (mem_s.s.offset)
|
|
mem_s.s.alg = MEMALG_SUB;
|
|
else
|
|
mem_s.s.alg = MEMALG_SUBLEN;
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, mem_s.u64);
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
|
|
/* FAU counter binding reg1 */
|
|
if (cvmx_unlikely(pko_command.s.reg1)) {
|
|
cvmx_pko_send_mem_t mem_s;
|
|
|
|
debug("%s: Legacy FAU commands: reg1=%#x sz1=%#x\n", __func__,
|
|
pko_command.s.reg1, pko_command.s.size1);
|
|
mem_s.u64 = 0;
|
|
mem_s.s.subdc4 = CVMX_PKO_SENDSUBDC_MEM;
|
|
mem_s.s.addr = cvmx_ptr_to_phys(
|
|
CASTPTR(void, __cvmx_fau_sw_addr(pko_command.s.reg1)));
|
|
if (cvmx_likely(pko_command.s.size1 == CVMX_FAU_OP_SIZE_64))
|
|
mem_s.s.dsz = MEMDSZ_B64;
|
|
else if (pko_command.s.size1 == CVMX_FAU_OP_SIZE_32)
|
|
mem_s.s.dsz = MEMDSZ_B32;
|
|
else if (pko_command.s.size1 == CVMX_FAU_OP_SIZE_16)
|
|
mem_s.s.dsz = MEMDSZ_B16;
|
|
else
|
|
mem_s.s.dsz = MEMDSZ_B8;
|
|
|
|
if (mem_s.s.dsz == MEMDSZ_B16 || mem_s.s.dsz == MEMDSZ_B8)
|
|
printf("%s: ERROR: 8/16 bit decrement unsupported",
|
|
__func__);
|
|
|
|
mem_s.s.offset = pko_command.s.subone1;
|
|
if (mem_s.s.offset)
|
|
mem_s.s.alg = MEMALG_SUB;
|
|
else
|
|
mem_s.s.alg = MEMALG_SUBLEN;
|
|
|
|
res = __cvmx_pko3_cmd_subdc_add(&desc, mem_s.u64);
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
|
|
/* These PKO_HDR_S fields are not used: */
|
|
/* hdr_s->s.ds does not have legacy equivalent, remains 0 */
|
|
/* hdr_s->s.format has no legacy equivalent, remains 0 */
|
|
|
|
/*** Finalize command buffer ***/
|
|
res = __cvmx_pko3_cmd_done(&desc);
|
|
if (res < 0)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
|
|
/*** Send the PKO3 command into the Descriptor Queue ***/
|
|
pko_status =
|
|
__cvmx_pko3_lmtdma(desc.port_node, dq, desc.word_count, tag_sw);
|
|
|
|
/*** Map PKO3 result codes to legacy return values ***/
|
|
if (cvmx_likely(pko_status.s.dqstatus == PKO_DQSTATUS_PASS))
|
|
return CVMX_PKO_SUCCESS;
|
|
|
|
debug("%s: ERROR: failed to enqueue: %s\n", __func__,
|
|
pko_dqstatus_error(pko_status.s.dqstatus));
|
|
|
|
if (pko_status.s.dqstatus == PKO_DQSTATUS_ALREADY)
|
|
return CVMX_PKO_PORT_ALREADY_SETUP;
|
|
if (pko_status.s.dqstatus == PKO_DQSTATUS_NOFPABUF ||
|
|
pko_status.s.dqstatus == PKO_DQSTATUS_NOPKOBUF)
|
|
return CVMX_PKO_NO_MEMORY;
|
|
if (pko_status.s.dqstatus == PKO_DQSTATUS_NOTCREATED)
|
|
return CVMX_PKO_INVALID_QUEUE;
|
|
if (pko_status.s.dqstatus == PKO_DQSTATUS_BADSTATE)
|
|
return CVMX_PKO_CMD_QUEUE_INIT_ERROR;
|
|
if (pko_status.s.dqstatus == PKO_DQSTATUS_SENDPKTDROP)
|
|
return CVMX_PKO_INVALID_PORT;
|
|
|
|
return CVMX_PKO_INVALID_PORT;
|
|
}
|