Zong Li ffe9a394df riscv: dts: add dts for unmatched rev1 ... The difference between unmatched rev3 and rev1 is DDR timing, the rev3 uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2021-07-06 20:24:26 +08:00
..
cpu	riscv: sifive: fu740: Support i2c in spl	2021-07-06 20:24:25 +08:00
dts	riscv: dts: add dts for unmatched rev1	2021-07-06 20:24:26 +08:00
include/asm	board: sifive: Add an interface to get PCB revision	2021-07-06 20:24:25 +08:00
lib	riscv: andes_plic: Fix riscv_get_ipi() mask	2021-06-17 09:39:46 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	board: riscv: add openpiton-riscv64 SoC support	2021-07-06 13:50:56 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00