mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 02:08:38 +00:00
f76750d111
This converts the following to Kconfig: CONFIG_CONS_INDEX CONFIG_DEBUG_UART_CLOCK CONFIG_FSL_TZPC_BP147 CONFIG_GENERIC_ATMEL_MCI CONFIG_IDENT_STRING CONFIG_LIBATA CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_LPC32XX_GPIO CONFIG_MP CONFIG_MPC8XXX_GPIO CONFIG_MTD_PARTITIONS CONFIG_MVGBE CONFIG_MXC_GPIO CONFIG_NR_DRAM_BANKS CONFIG_OF_BOARD_SETUP CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_OF_SYSTEM_SETUP CONFIG_PREBOOT CONFIG_ROCKCHIP_SERIAL CONFIG_RTC_ENABLE_32KHZ_OUTPUT CONFIG_RTC_MV CONFIG_SCSI_AHCI CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_SPEED CONFIG_SOFT_SPI CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_MACRONIX CONFIG_SPI_FLASH_MTD CONFIG_SPI_FLASH_SPANSION CONFIG_SPI_FLASH_SST CONFIG_SPI_FLASH_STMICRO CONFIG_SUPPORT_RAW_INITRD CONFIG_SYS_ARCH_TIMER CONFIG_SYS_BOARD CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE CONFIG_SYS_DCACHE_OFF CONFIG_SYS_FDT_SAVE_ADDRESS CONFIG_SYS_FLASH_CFI CONFIG_SYS_FSL_ERRATUM_ESDHC135 CONFIG_SYS_HAS_SERDES CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_LITTLE_ENDIAN CONFIG_SYS_LOAD_ADDR CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR CONFIG_SYS_NS16550 CONFIG_SYS_PLLFIN CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_TIMER_SYS_TICK_CH CONFIG_USB_EHCI_FSL CONFIG_U_QE CONFIG_VERSION_VARIABLE Signed-off-by: Tom Rini <trini@konsulko.com>
86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Bluewater Systems Snapper 9G45 module
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*
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* (C) Copyright 2011 Bluewater Systems
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* Author: Andre Renaud <andre@bluewatersys.com>
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* Author: Ryan Mallon <ryan@bluewatersys.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SoC type is defined in boards.cfg */
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#include <asm/hardware.h>
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#include <linux/sizes.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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/* CPU */
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
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#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */
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#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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/* Mem test settings */
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/* NAND Flash */
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#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
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/* Ethernet */
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R
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#define CONFIG_AT91_WANTS_COMMON_PHY
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#define CONFIG_TFTP_PORT
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/* LCD */
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#define CONFIG_ATMEL_LCD
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#define CONFIG_GURNARD_SPLASH
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/* GPIOs and IO expander */
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#define CONFIG_ATMEL_LEGACY
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#define CONFIG_AT91_GPIO_PULLUP 1
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/* UARTs/Serial console */
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/* Boot options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* Environment settings */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"ethaddr=00:00:00:00:00:00\0" \
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"serial=0\0" \
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"stdout=serial_atmel\0" \
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"stderr=serial_atmel\0" \
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"stdin=serial_atmel\0" \
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"bootlimit=3\0" \
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"loadaddr=0x71000000\0" \
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"board_rev=2\0" \
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"bootfile=/tftpboot/uImage\0" \
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"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
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"nfsroot=/export/root\0" \
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"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
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"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
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"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
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"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
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"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
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"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
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"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
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/* Console settings */
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#endif /* __CONFIG_H */
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