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https://github.com/AsahiLinux/u-boot
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cdf3192452
On the iMX7ULP uCOM board, OP-TEE uses the memory region defined by the maximum DRAM address minus CONFIG_OPTEE_TZDRAM_SIZE, so subtract CONFIG_OPTEE_TZDRAM_SIZE from the available DRAM size to avoid conflicts. Note the OPTEE boot process itself subtracts the DRAM region it lives in from the memory map passed to Linux. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
54 lines
993 B
C
54 lines
993 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mx7ulp-pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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#ifdef CONFIG_OPTEE_TZDRAM_SIZE
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gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
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#endif
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return 0;
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}
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static iomux_cfg_t const lpuart4_pads[] = {
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MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
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ARRAY_SIZE(lpuart4_pads));
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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