u-boot/arch/riscv/cpu/fu540/Makefile
Pragnesh Patel 5ce50206ed riscv: sifive: fu540: enable all cache ways from U-Boot proper
Add L2 cache node to enable all cache ways from U-Boot proper.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-03 15:09:06 +08:00

12 lines
220 B
Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2020 SiFive, Inc
# Pragnesh Patel <pragnesh.patel@sifive.com>
ifeq ($(CONFIG_SPL_BUILD),y)
obj-y += spl.o
else
obj-y += dram.o
obj-y += cpu.o
obj-y += cache.o
endif