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25c7de2255
Add support for the Creator CI20 platform based on the JZ4780 SoC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
72 lines
2.2 KiB
C
72 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* CI20 configuration
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*
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* Copyright (c) 2013 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*/
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#ifndef __CONFIG_CI20_H__
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#define __CONFIG_CI20_H__
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Ingenic JZ4780 clock configuration. */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 1200
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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/* Memory configuration */
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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#define CONFIG_SYS_LOAD_ADDR 0x81000000
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#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x88000000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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/* NS16550-ish UARTs */
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#define CONFIG_SYS_NS16550_CLK 48000000
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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/* Ethernet: davicom DM9000 */
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_BASE 0xb6000000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
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/* Environment */
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_SIZE (32 << 10)
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#define CONFIG_ENV_OFFSET ((14 + 512) << 10)
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#define CONFIG_ENV_OVERWRITE
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/* Command line configuration. */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Boot argument buffer size */
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#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
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/* Miscellaneous configuration options */
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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/* SPL */
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#define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */
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#define CONFIG_SPL_TEXT_BASE 0xf4000a00
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#define CONFIG_SPL_MAX_SIZE ((14 * 1024) - 0xa00)
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#define CONFIG_SPL_BSS_START_ADDR 0xf4004000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 512KB, arbitrary */
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#define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx"
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */
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#endif /* __CONFIG_CI20_H__ */
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