mirror of
https://github.com/AsahiLinux/u-boot
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1db251bdd5
This converts the following to Kconfig: CONFIG_SYS_MAX_FLASH_SECT Signed-off-by: Tom Rini <trini@konsulko.com>
56 lines
1.2 KiB
C
56 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the SAMA5D3xEK board.
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*
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* Copyright (C) 2012 - 2013 Atmel
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*
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* based on at91sam9m10g45ek.h by:
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "at91-sama5_common.h"
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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*/
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#define ATMEL_ID_UHP 32
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/*
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* Specify the clock enable bit in the PMC_SCER register.
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*/
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#define ATMEL_PMC_UHP (1 << 6)
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/* board specific (not enough SRAM) */
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#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
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/* NOR flash */
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#ifdef CONFIG_MTD_NOR_FLASH
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#define CONFIG_SYS_FLASH_BASE 0x10000000
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#endif
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000
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/* SerialFlash */
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x60000000
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#endif
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/* SPL */
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#define CONFIG_SYS_MONITOR_LEN (512 << 10)
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#endif
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